@@ -3674,6 +3674,21 @@ static int mv88e6xxx_stats_setup(struct mv88e6xxx_chip *chip)
36743674 return mv88e6xxx_g1_stats_clear (chip );
36753675}
36763676
3677+ static int mv88e6320_setup_errata (struct mv88e6xxx_chip * chip )
3678+ {
3679+ u16 dummy ;
3680+ int err ;
3681+
3682+ /* Workaround for erratum
3683+ * 3.3 RGMII timing may be out of spec when transmit delay is enabled
3684+ */
3685+ err = mv88e6xxx_port_hidden_write (chip , 0 , 0xf , 0x7 , 0xe000 );
3686+ if (err )
3687+ return err ;
3688+
3689+ return mv88e6xxx_port_hidden_read (chip , 0 , 0xf , 0x7 , & dummy );
3690+ }
3691+
36773692/* Check if the errata has already been applied. */
36783693static bool mv88e6390_setup_errata_applied (struct mv88e6xxx_chip * chip )
36793694{
@@ -5130,6 +5145,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
51305145
51315146static const struct mv88e6xxx_ops mv88e6320_ops = {
51325147 /* MV88E6XXX_FAMILY_6320 */
5148+ .setup_errata = mv88e6320_setup_errata ,
51335149 .ieee_pri_map = mv88e6085_g1_ieee_pri_map ,
51345150 .ip_pri_map = mv88e6085_g1_ip_pri_map ,
51355151 .irl_init_all = mv88e6352_g2_irl_init_all ,
@@ -5145,6 +5161,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
51455161 .port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay ,
51465162 .port_set_speed_duplex = mv88e6185_port_set_speed_duplex ,
51475163 .port_tag_remap = mv88e6095_port_tag_remap ,
5164+ .port_set_policy = mv88e6352_port_set_policy ,
51485165 .port_set_frame_mode = mv88e6351_port_set_frame_mode ,
51495166 .port_set_ucast_flood = mv88e6352_port_set_ucast_flood ,
51505167 .port_set_mcast_flood = mv88e6352_port_set_mcast_flood ,
@@ -5169,8 +5186,10 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
51695186 .hardware_reset_pre = mv88e6xxx_g2_eeprom_wait ,
51705187 .hardware_reset_post = mv88e6xxx_g2_eeprom_wait ,
51715188 .reset = mv88e6352_g1_reset ,
5172- .vtu_getnext = mv88e6185_g1_vtu_getnext ,
5173- .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge ,
5189+ .vtu_getnext = mv88e6352_g1_vtu_getnext ,
5190+ .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge ,
5191+ .stu_getnext = mv88e6352_g1_stu_getnext ,
5192+ .stu_loadpurge = mv88e6352_g1_stu_loadpurge ,
51745193 .gpio_ops = & mv88e6352_gpio_ops ,
51755194 .avb_ops = & mv88e6352_avb_ops ,
51765195 .ptp_ops = & mv88e6352_ptp_ops ,
@@ -5179,6 +5198,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
51795198
51805199static const struct mv88e6xxx_ops mv88e6321_ops = {
51815200 /* MV88E6XXX_FAMILY_6320 */
5201+ .setup_errata = mv88e6320_setup_errata ,
51825202 .ieee_pri_map = mv88e6085_g1_ieee_pri_map ,
51835203 .ip_pri_map = mv88e6085_g1_ip_pri_map ,
51845204 .irl_init_all = mv88e6352_g2_irl_init_all ,
@@ -5194,6 +5214,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
51945214 .port_set_rgmii_delay = mv88e6320_port_set_rgmii_delay ,
51955215 .port_set_speed_duplex = mv88e6185_port_set_speed_duplex ,
51965216 .port_tag_remap = mv88e6095_port_tag_remap ,
5217+ .port_set_policy = mv88e6352_port_set_policy ,
51975218 .port_set_frame_mode = mv88e6351_port_set_frame_mode ,
51985219 .port_set_ucast_flood = mv88e6352_port_set_ucast_flood ,
51995220 .port_set_mcast_flood = mv88e6352_port_set_mcast_flood ,
@@ -5217,8 +5238,10 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
52175238 .hardware_reset_pre = mv88e6xxx_g2_eeprom_wait ,
52185239 .hardware_reset_post = mv88e6xxx_g2_eeprom_wait ,
52195240 .reset = mv88e6352_g1_reset ,
5220- .vtu_getnext = mv88e6185_g1_vtu_getnext ,
5221- .vtu_loadpurge = mv88e6185_g1_vtu_loadpurge ,
5241+ .vtu_getnext = mv88e6352_g1_vtu_getnext ,
5242+ .vtu_loadpurge = mv88e6352_g1_vtu_loadpurge ,
5243+ .stu_getnext = mv88e6352_g1_stu_getnext ,
5244+ .stu_loadpurge = mv88e6352_g1_stu_loadpurge ,
52225245 .gpio_ops = & mv88e6352_gpio_ops ,
52235246 .avb_ops = & mv88e6352_avb_ops ,
52245247 .ptp_ops = & mv88e6352_ptp_ops ,
@@ -5818,7 +5841,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
58185841 .global1_addr = 0x1b ,
58195842 .global2_addr = 0x1c ,
58205843 .age_time_coeff = 3750 ,
5821- .atu_move_port_mask = 0x1f ,
5844+ .atu_move_port_mask = 0xf ,
58225845 .g1_irqs = 9 ,
58235846 .g2_irqs = 10 ,
58245847 .stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1 ,
@@ -6236,9 +6259,11 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
62366259 .num_databases = 4096 ,
62376260 .num_macs = 8192 ,
62386261 .num_ports = 7 ,
6239- .num_internal_phys = 5 ,
6262+ .num_internal_phys = 2 ,
6263+ .internal_phys_offset = 3 ,
62406264 .num_gpio = 15 ,
62416265 .max_vid = 4095 ,
6266+ .max_sid = 63 ,
62426267 .port_base_addr = 0x10 ,
62436268 .phy_base_addr = 0x0 ,
62446269 .global1_addr = 0x1b ,
@@ -6262,9 +6287,11 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
62626287 .num_databases = 4096 ,
62636288 .num_macs = 8192 ,
62646289 .num_ports = 7 ,
6265- .num_internal_phys = 5 ,
6290+ .num_internal_phys = 2 ,
6291+ .internal_phys_offset = 3 ,
62666292 .num_gpio = 15 ,
62676293 .max_vid = 4095 ,
6294+ .max_sid = 63 ,
62686295 .port_base_addr = 0x10 ,
62696296 .phy_base_addr = 0x0 ,
62706297 .global1_addr = 0x1b ,
@@ -6274,6 +6301,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
62746301 .g2_irqs = 10 ,
62756302 .stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1 ,
62766303 .atu_move_port_mask = 0xf ,
6304+ .pvt = true,
62776305 .multi_chip = true,
62786306 .edsa_support = MV88E6XXX_EDSA_SUPPORTED ,
62796307 .ptp_support = true,
@@ -6296,7 +6324,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
62966324 .global1_addr = 0x1b ,
62976325 .global2_addr = 0x1c ,
62986326 .age_time_coeff = 3750 ,
6299- .atu_move_port_mask = 0x1f ,
6327+ .atu_move_port_mask = 0xf ,
63006328 .g1_irqs = 9 ,
63016329 .g2_irqs = 10 ,
63026330 .stats_type = STATS_TYPE_BANK0 | STATS_TYPE_BANK1 ,
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