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Shahar Shitritkuba-moo
Shahar Shitrit
authored and
kuba-moo
committed
net/mlx5e: Enable lanes configuration when auto-negotiation is off
Currently, when auto-negotiation is disabled, the driver retrieves the speed and converts it into all link modes that correspond to that speed. With this patch, we add the ability to set the number of lanes, so that the combination of speed and lanes corresponds to exactly one specific link mode for the extended bit map. For the legacy bit map the driver sets all link modes correspond to speed and lanes. This change provides users with the option to set a specific link mode, rather than enabling all link modes associated with a given speed when auto-negotiation is off. Signed-off-by: Shahar Shitrit <shshitrit@nvidia.com> Reviewed-by: Carolina Jubran <cjubran@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Link: https://patch.msgid.link/20250304160620.417580-4-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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3 files changed

+67
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‎drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c‎

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,9 @@
4242
#include "lib/clock.h"
4343
#include "en/fs_ethtool.h"
4444

45+
#define LANES_UNKNOWN 0
46+
#define MAX_LANES 8
47+
4548
void mlx5e_ethtool_get_drvinfo(struct mlx5e_priv *priv,
4649
struct ethtool_drvinfo *drvinfo)
4750
{
@@ -1076,30 +1079,34 @@ static void ptys2ethtool_supported_advertised_port(struct mlx5_core_dev *mdev,
10761079
}
10771080
}
10781081

1079-
static void get_speed_duplex(struct net_device *netdev,
1080-
u32 eth_proto_oper, bool force_legacy,
1081-
u16 data_rate_oper,
1082-
struct ethtool_link_ksettings *link_ksettings)
1082+
static void get_link_properties(struct net_device *netdev,
1083+
u32 eth_proto_oper, bool force_legacy,
1084+
u16 data_rate_oper,
1085+
struct ethtool_link_ksettings *link_ksettings)
10831086
{
10841087
struct mlx5e_priv *priv = netdev_priv(netdev);
10851088
const struct mlx5_link_info *info;
10861089
u8 duplex = DUPLEX_UNKNOWN;
10871090
u32 speed = SPEED_UNKNOWN;
1091+
u32 lanes = LANES_UNKNOWN;
10881092

10891093
if (!netif_carrier_ok(netdev))
10901094
goto out;
10911095

10921096
info = mlx5_port_ptys2info(priv->mdev, eth_proto_oper, force_legacy);
10931097
if (info) {
10941098
speed = info->speed;
1099+
lanes = info->lanes;
10951100
duplex = DUPLEX_FULL;
10961101
} else if (data_rate_oper) {
10971102
speed = 100 * data_rate_oper;
1103+
lanes = MAX_LANES;
10981104
}
10991105

11001106
out:
1101-
link_ksettings->base.speed = speed;
11021107
link_ksettings->base.duplex = duplex;
1108+
link_ksettings->base.speed = speed;
1109+
link_ksettings->lanes = lanes;
11031110
}
11041111

11051112
static void get_supported(struct mlx5_core_dev *mdev, u32 eth_proto_cap,
@@ -1236,8 +1243,8 @@ static int mlx5e_ethtool_get_link_ksettings(struct mlx5e_priv *priv,
12361243
get_supported(mdev, eth_proto_cap, link_ksettings);
12371244
get_advertising(eth_proto_admin, tx_pause, rx_pause, link_ksettings,
12381245
admin_ext);
1239-
get_speed_duplex(priv->netdev, eth_proto_oper, !admin_ext,
1240-
data_rate_oper, link_ksettings);
1246+
get_link_properties(priv->netdev, eth_proto_oper, !admin_ext,
1247+
data_rate_oper, link_ksettings);
12411248

12421249
eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
12431250
connector_type = connector_type < MLX5E_CONNECTOR_TYPE_NUMBER ?
@@ -1366,6 +1373,7 @@ static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
13661373
adver = link_ksettings->link_modes.advertising;
13671374
autoneg = link_ksettings->base.autoneg;
13681375
info.speed = link_ksettings->base.speed;
1376+
info.lanes = link_ksettings->lanes;
13691377

13701378
ext_supported = mlx5_ptys_ext_supported(mdev);
13711379
ext_requested = ext_link_mode_requested(adver);
@@ -2613,6 +2621,7 @@ static void mlx5e_get_ts_stats(struct net_device *netdev,
26132621
}
26142622

26152623
const struct ethtool_ops mlx5e_ethtool_ops = {
2624+
.cap_link_lanes_supported = true,
26162625
.cap_rss_ctx_supported = true,
26172626
.rxfh_per_ctx_key = true,
26182627
.supported_coalesce_params = ETHTOOL_COALESCE_USECS |

‎drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -131,6 +131,7 @@ struct mlx5_module_eeprom_query_params {
131131

132132
struct mlx5_link_info {
133133
u32 speed;
134+
u32 lanes;
134135
};
135136

136137
static inline void mlx5_printk(struct mlx5_core_dev *dev, int level, const char *format, ...)

‎drivers/net/ethernet/mellanox/mlx5/core/port.c‎

Lines changed: 50 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -1039,56 +1039,56 @@ int mlx5_query_dscp2prio(struct mlx5_core_dev *mdev, u8 *dscp2prio)
10391039

10401040
/* speed in units of 1Mb */
10411041
static const struct mlx5_link_info mlx5e_link_info[MLX5E_LINK_MODES_NUMBER] = {
1042-
[MLX5E_1000BASE_CX_SGMII] = {.speed = 1000},
1043-
[MLX5E_1000BASE_KX] = {.speed = 1000},
1044-
[MLX5E_10GBASE_CX4] = {.speed = 10000},
1045-
[MLX5E_10GBASE_KX4] = {.speed = 10000},
1046-
[MLX5E_10GBASE_KR] = {.speed = 10000},
1047-
[MLX5E_20GBASE_KR2] = {.speed = 20000},
1048-
[MLX5E_40GBASE_CR4] = {.speed = 40000},
1049-
[MLX5E_40GBASE_KR4] = {.speed = 40000},
1050-
[MLX5E_56GBASE_R4] = {.speed = 56000},
1051-
[MLX5E_10GBASE_CR] = {.speed = 10000},
1052-
[MLX5E_10GBASE_SR] = {.speed = 10000},
1053-
[MLX5E_10GBASE_ER] = {.speed = 10000},
1054-
[MLX5E_40GBASE_SR4] = {.speed = 40000},
1055-
[MLX5E_40GBASE_LR4] = {.speed = 40000},
1056-
[MLX5E_50GBASE_SR2] = {.speed = 50000},
1057-
[MLX5E_100GBASE_CR4] = {.speed = 100000},
1058-
[MLX5E_100GBASE_SR4] = {.speed = 100000},
1059-
[MLX5E_100GBASE_KR4] = {.speed = 100000},
1060-
[MLX5E_100GBASE_LR4] = {.speed = 100000},
1061-
[MLX5E_100BASE_TX] = {.speed = 100},
1062-
[MLX5E_1000BASE_T] = {.speed = 1000},
1063-
[MLX5E_10GBASE_T] = {.speed = 10000},
1064-
[MLX5E_25GBASE_CR] = {.speed = 25000},
1065-
[MLX5E_25GBASE_KR] = {.speed = 25000},
1066-
[MLX5E_25GBASE_SR] = {.speed = 25000},
1067-
[MLX5E_50GBASE_CR2] = {.speed = 50000},
1068-
[MLX5E_50GBASE_KR2] = {.speed = 50000},
1042+
[MLX5E_1000BASE_CX_SGMII] = {.speed = 1000, .lanes = 1},
1043+
[MLX5E_1000BASE_KX] = {.speed = 1000, .lanes = 1},
1044+
[MLX5E_10GBASE_CX4] = {.speed = 10000, .lanes = 4},
1045+
[MLX5E_10GBASE_KX4] = {.speed = 10000, .lanes = 4},
1046+
[MLX5E_10GBASE_KR] = {.speed = 10000, .lanes = 1},
1047+
[MLX5E_20GBASE_KR2] = {.speed = 20000, .lanes = 2},
1048+
[MLX5E_40GBASE_CR4] = {.speed = 40000, .lanes = 4},
1049+
[MLX5E_40GBASE_KR4] = {.speed = 40000, .lanes = 4},
1050+
[MLX5E_56GBASE_R4] = {.speed = 56000, .lanes = 4},
1051+
[MLX5E_10GBASE_CR] = {.speed = 10000, .lanes = 1},
1052+
[MLX5E_10GBASE_SR] = {.speed = 10000, .lanes = 1},
1053+
[MLX5E_10GBASE_ER] = {.speed = 10000, .lanes = 1},
1054+
[MLX5E_40GBASE_SR4] = {.speed = 40000, .lanes = 4},
1055+
[MLX5E_40GBASE_LR4] = {.speed = 40000, .lanes = 4},
1056+
[MLX5E_50GBASE_SR2] = {.speed = 50000, .lanes = 2},
1057+
[MLX5E_100GBASE_CR4] = {.speed = 100000, .lanes = 4},
1058+
[MLX5E_100GBASE_SR4] = {.speed = 100000, .lanes = 4},
1059+
[MLX5E_100GBASE_KR4] = {.speed = 100000, .lanes = 4},
1060+
[MLX5E_100GBASE_LR4] = {.speed = 100000, .lanes = 4},
1061+
[MLX5E_100BASE_TX] = {.speed = 100, .lanes = 1},
1062+
[MLX5E_1000BASE_T] = {.speed = 1000, .lanes = 1},
1063+
[MLX5E_10GBASE_T] = {.speed = 10000, .lanes = 1},
1064+
[MLX5E_25GBASE_CR] = {.speed = 25000, .lanes = 1},
1065+
[MLX5E_25GBASE_KR] = {.speed = 25000, .lanes = 1},
1066+
[MLX5E_25GBASE_SR] = {.speed = 25000, .lanes = 1},
1067+
[MLX5E_50GBASE_CR2] = {.speed = 50000, .lanes = 2},
1068+
[MLX5E_50GBASE_KR2] = {.speed = 50000, .lanes = 2},
10691069
};
10701070

10711071
static const struct mlx5_link_info
10721072
mlx5e_ext_link_info[MLX5E_EXT_LINK_MODES_NUMBER] = {
1073-
[MLX5E_SGMII_100M] = {.speed = 100},
1074-
[MLX5E_1000BASE_X_SGMII] = {.speed = 1000},
1075-
[MLX5E_5GBASE_R] = {.speed = 5000},
1076-
[MLX5E_10GBASE_XFI_XAUI_1] = {.speed = 10000},
1077-
[MLX5E_40GBASE_XLAUI_4_XLPPI_4] = {.speed = 40000},
1078-
[MLX5E_25GAUI_1_25GBASE_CR_KR] = {.speed = 25000},
1079-
[MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2] = {.speed = 50000},
1080-
[MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR] = {.speed = 50000},
1081-
[MLX5E_CAUI_4_100GBASE_CR4_KR4] = {.speed = 100000},
1082-
[MLX5E_100GAUI_2_100GBASE_CR2_KR2] = {.speed = 100000},
1083-
[MLX5E_200GAUI_4_200GBASE_CR4_KR4] = {.speed = 200000},
1084-
[MLX5E_400GAUI_8_400GBASE_CR8] = {.speed = 400000},
1085-
[MLX5E_100GAUI_1_100GBASE_CR_KR] = {.speed = 100000},
1086-
[MLX5E_200GAUI_2_200GBASE_CR2_KR2] = {.speed = 200000},
1087-
[MLX5E_400GAUI_4_400GBASE_CR4_KR4] = {.speed = 400000},
1088-
[MLX5E_800GAUI_8_800GBASE_CR8_KR8] = {.speed = 800000},
1089-
[MLX5E_200GAUI_1_200GBASE_CR1_KR1] = {.speed = 200000},
1090-
[MLX5E_400GAUI_2_400GBASE_CR2_KR2] = {.speed = 400000},
1091-
[MLX5E_800GAUI_4_800GBASE_CR4_KR4] = {.speed = 800000},
1073+
[MLX5E_SGMII_100M] = {.speed = 100, .lanes = 1},
1074+
[MLX5E_1000BASE_X_SGMII] = {.speed = 1000, .lanes = 1},
1075+
[MLX5E_5GBASE_R] = {.speed = 5000, .lanes = 1},
1076+
[MLX5E_10GBASE_XFI_XAUI_1] = {.speed = 10000, .lanes = 1},
1077+
[MLX5E_40GBASE_XLAUI_4_XLPPI_4] = {.speed = 40000, .lanes = 4},
1078+
[MLX5E_25GAUI_1_25GBASE_CR_KR] = {.speed = 25000, .lanes = 1},
1079+
[MLX5E_50GAUI_2_LAUI_2_50GBASE_CR2_KR2] = {.speed = 50000, .lanes = 2},
1080+
[MLX5E_50GAUI_1_LAUI_1_50GBASE_CR_KR] = {.speed = 50000, .lanes = 1},
1081+
[MLX5E_CAUI_4_100GBASE_CR4_KR4] = {.speed = 100000, .lanes = 4},
1082+
[MLX5E_100GAUI_2_100GBASE_CR2_KR2] = {.speed = 100000, .lanes = 2},
1083+
[MLX5E_200GAUI_4_200GBASE_CR4_KR4] = {.speed = 200000, .lanes = 4},
1084+
[MLX5E_400GAUI_8_400GBASE_CR8] = {.speed = 400000, .lanes = 8},
1085+
[MLX5E_100GAUI_1_100GBASE_CR_KR] = {.speed = 100000, .lanes = 1},
1086+
[MLX5E_200GAUI_2_200GBASE_CR2_KR2] = {.speed = 200000, .lanes = 2},
1087+
[MLX5E_400GAUI_4_400GBASE_CR4_KR4] = {.speed = 400000, .lanes = 4},
1088+
[MLX5E_800GAUI_8_800GBASE_CR8_KR8] = {.speed = 800000, .lanes = 8},
1089+
[MLX5E_200GAUI_1_200GBASE_CR1_KR1] = {.speed = 200000, .lanes = 1},
1090+
[MLX5E_400GAUI_2_400GBASE_CR2_KR2] = {.speed = 400000, .lanes = 2},
1091+
[MLX5E_800GAUI_4_800GBASE_CR4_KR4] = {.speed = 800000, .lanes = 4},
10921092
};
10931093

10941094
int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,
@@ -1168,8 +1168,10 @@ u32 mlx5_port_info2linkmodes(struct mlx5_core_dev *mdev,
11681168
mlx5e_port_get_link_mode_info_arr(mdev, &table, &max_size,
11691169
force_legacy);
11701170
for (i = 0; i < max_size; ++i) {
1171-
if (table[i].speed == info->speed)
1172-
link_modes |= MLX5E_PROT_MASK(i);
1171+
if (table[i].speed == info->speed) {
1172+
if (!info->lanes || table[i].lanes == info->lanes)
1173+
link_modes |= MLX5E_PROT_MASK(i);
1174+
}
11731175
}
11741176
return link_modes;
11751177
}

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