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net: phy: consolidate PHY reset in phy_init_hw()
There are quite a lot of drivers touching a PHY device MII_BMCR register to reset the PHY without taking care of: 1) ensuring that BMCR_RESET is cleared after a given timeout 2) the PHY state machine resuming to the proper state and re-applying potentially changed settings such as auto-negotiation Introduce phy_poll_reset() which will take care of polling the MII_BMCR for the BMCR_RESET bit to be cleared after a given timeout or return a timeout error code. In order to make sure the PHY is in a correct state, phy_init_hw() first issues a software reset through MII_BMCR and then applies any fixups. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Documentation/networking/phy.txt

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,8 @@ Writing a PHY driver
255255

256256
config_init: configures PHY into a sane state after a reset.
257257
For instance, a Davicom PHY requires descrambling disabled.
258-
probe: Does any setup needed by the driver
258+
probe: Allocate phy->priv, optionally refuse to bind.
259+
PHY may not have been reset or had fixups run yet.
259260
suspend/resume: power management
260261
config_aneg: Changes the speed/duplex/negotiation settings
261262
read_status: Reads the current speed/duplex/negotiation settings

drivers/net/phy/phy.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -318,6 +318,7 @@ int phy_mii_ioctl(struct phy_device *phydev,
318318
{
319319
struct mii_ioctl_data *mii_data = if_mii(ifr);
320320
u16 val = mii_data->val_in;
321+
int ret = 0;
321322

322323
switch (cmd) {
323324
case SIOCGMIIPHY:
@@ -362,7 +363,7 @@ int phy_mii_ioctl(struct phy_device *phydev,
362363

363364
if (mii_data->reg_num == MII_BMCR &&
364365
val & BMCR_RESET)
365-
phy_init_hw(phydev);
366+
ret = phy_init_hw(phydev);
366367
break;
367368

368369
case SIOCSHWTSTAMP:
@@ -374,7 +375,7 @@ int phy_mii_ioctl(struct phy_device *phydev,
374375
return -EOPNOTSUPP;
375376
}
376377

377-
return 0;
378+
return ret;
378379
}
379380
EXPORT_SYMBOL(phy_mii_ioctl);
380381

drivers/net/phy/phy_device.c

Lines changed: 55 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -364,7 +364,11 @@ int phy_device_register(struct phy_device *phydev)
364364
phydev->bus->phy_map[phydev->addr] = phydev;
365365

366366
/* Run all of the fixups for this PHY */
367-
phy_scan_fixups(phydev);
367+
err = phy_init_hw(phydev);
368+
if (err) {
369+
pr_err("PHY %d failed to initialize\n", phydev->addr);
370+
goto out;
371+
}
368372

369373
err = device_add(&phydev->dev);
370374
if (err) {
@@ -497,19 +501,69 @@ void phy_disconnect(struct phy_device *phydev)
497501
}
498502
EXPORT_SYMBOL(phy_disconnect);
499503

504+
/**
505+
* phy_poll_reset - Safely wait until a PHY reset has properly completed
506+
* @phydev: The PHY device to poll
507+
*
508+
* Description: According to IEEE 802.3, Section 2, Subsection 22.2.4.1.1, as
509+
* published in 2008, a PHY reset may take up to 0.5 seconds. The MII BMCR
510+
* register must be polled until the BMCR_RESET bit clears.
511+
*
512+
* Furthermore, any attempts to write to PHY registers may have no effect
513+
* or even generate MDIO bus errors until this is complete.
514+
*
515+
* Some PHYs (such as the Marvell 88E1111) don't entirely conform to the
516+
* standard and do not fully reset after the BMCR_RESET bit is set, and may
517+
* even *REQUIRE* a soft-reset to properly restart autonegotiation. In an
518+
* effort to support such broken PHYs, this function is separate from the
519+
* standard phy_init_hw() which will zero all the other bits in the BMCR
520+
* and reapply all driver-specific and board-specific fixups.
521+
*/
522+
static int phy_poll_reset(struct phy_device *phydev)
523+
{
524+
/* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
525+
unsigned int retries = 12;
526+
int ret;
527+
528+
do {
529+
msleep(50);
530+
ret = phy_read(phydev, MII_BMCR);
531+
if (ret < 0)
532+
return ret;
533+
} while (ret & BMCR_RESET && --retries);
534+
if (ret & BMCR_RESET)
535+
return -ETIMEDOUT;
536+
537+
/*
538+
* Some chips (smsc911x) may still need up to another 1ms after the
539+
* BMCR_RESET bit is cleared before they are usable.
540+
*/
541+
msleep(1);
542+
return 0;
543+
}
544+
500545
int phy_init_hw(struct phy_device *phydev)
501546
{
502547
int ret;
503548

504549
if (!phydev->drv || !phydev->drv->config_init)
505550
return 0;
506551

552+
ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
553+
if (ret < 0)
554+
return ret;
555+
556+
ret = phy_poll_reset(phydev);
557+
if (ret < 0)
558+
return ret;
559+
507560
ret = phy_scan_fixups(phydev);
508561
if (ret < 0)
509562
return ret;
510563

511564
return phydev->drv->config_init(phydev);
512565
}
566+
EXPORT_SYMBOL(phy_init_hw);
513567

514568
/**
515569
* phy_attach_direct - attach a network device to a given PHY device pointer

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