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Zhu Ningbroonie
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ASoC: dt-bindings: Add Everest ES8326 audio CODEC
Add device tree binding documentation for Everest ES8326 ---- v5 tested by dtschema Signed-off-by: David Yang <yangxiaohua@everest-semi.com> Signed-off-by: Zhu Ning <zhuning@everest-semi.com> Link: https://lore.kernel.org/r/20220816024456.4475-1-zhuning0077@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Everest ES8326 audio CODEC
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maintainers:
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- David Yang <yangxiaohua@everest-semi.com>
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properties:
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compatible:
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const: everest,es8326
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reg:
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maxItems: 1
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clocks:
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items:
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- description: clock for master clock (MCLK)
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clock-names:
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items:
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- const: mclk
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"#sound-dai-cells":
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const: 0
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everest,jack-pol:
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$ref: /schemas/types.yaml#/definitions/uint8
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description: |
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just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
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Bit(2) decides whether the button on the headset is inverted.
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Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
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minimum: 0x00
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maximum: 0x0f
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default: 0x0f
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everest,mic1-src:
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$ref: /schemas/types.yaml#/definitions/uint8
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description:
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the value of reg 2A when headset plugged.
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minimum: 0x00
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maximum: 0x77
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default: 0x22
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everest,mic2-src:
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$ref: /schemas/types.yaml#/definitions/uint8
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description:
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the value of reg 2A when headset unplugged.
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minimum: 0x00
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maximum: 0x77
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default: 0x44
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everest,jack-detect-inverted:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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Defined to invert the jack detection.
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everest,interrupt-src:
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$ref: /schemas/types.yaml#/definitions/uint8
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description: |
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value of reg 0x58, Defines the interrupt source.
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Bit(2) 1 means button press triggers irq, 0 means not.
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Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
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bias change on PIN9 do not triggers irq.
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Bit(4) 1 means PIN27 is the irq source for jack detection.
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Bit(5) 1 means PIN9 is the irq source after MIC detect.
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Bit(6) 1 means PIN27 is the irq source after MIC detect.
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minimum: 0
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maximum: 0x3c
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default: 0x08
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everest,interrupt-clk:
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$ref: /schemas/types.yaml#/definitions/uint8
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description: |
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value of reg 0x59, Defines the interrupt output behavior.
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Bit(0-3) 0 means irq pulse equals 512*internal clock
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1 means irq pulse equals 1024*internal clock
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2 means ...
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7 means irq pulse equals 65536*internal clock
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8 means irq mutes PA
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9 means irq mutes PA and DAC output
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Bit(4) 1 means we invert the interrupt output.
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Bit(6) 1 means the chip do not detect jack type after button released.
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0 means the chip detect jack type again after button released.
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minimum: 0
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maximum: 0x7f
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default: 0x45
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required:
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- compatible
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- reg
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- "#sound-dai-cells"
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additionalProperties: false
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examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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es8326: codec@19 {
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compatible = "everest,es8326";
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reg = <0x19>;
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clocks = <&clks 10>;
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clock-names = "mclk";
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#sound-dai-cells = <0>;
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everest,mic1-src = [22];
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everest,mic2-src = [44];
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everest,jack-pol = [0e];
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everest,interrupt-src = [08];
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everest,interrupt-clk = [45];
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};
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};

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