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RDMA/irdma: Add miscellaneous utility definitions
Add miscellaneous utility functions and headers. Link: https://lore.kernel.org/r/20210602205138.889-13-shiraz.saleem@intel.com Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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‎drivers/infiniband/hw/irdma/osdep.h‎

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/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2015 - 2021 Intel Corporation */
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#ifndef IRDMA_OSDEP_H
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#define IRDMA_OSDEP_H
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#include <linux/pci.h>
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#include <linux/bitfield.h>
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#include <crypto/hash.h>
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#include <rdma/ib_verbs.h>
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#define STATS_TIMER_DELAY 60000
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struct irdma_dma_info {
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dma_addr_t *dmaaddrs;
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};
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struct irdma_dma_mem {
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void *va;
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dma_addr_t pa;
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u32 size;
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} __packed;
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struct irdma_virt_mem {
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void *va;
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u32 size;
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} __packed;
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struct irdma_sc_vsi;
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struct irdma_sc_dev;
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struct irdma_sc_qp;
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struct irdma_puda_buf;
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struct irdma_puda_cmpl_info;
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struct irdma_update_sds_info;
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struct irdma_hmc_fcn_info;
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struct irdma_manage_vf_pble_info;
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struct irdma_hw;
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struct irdma_pci_f;
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struct ib_device *to_ibdev(struct irdma_sc_dev *dev);
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u8 __iomem *irdma_get_hw_addr(void *dev);
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void irdma_ieq_mpa_crc_ae(struct irdma_sc_dev *dev, struct irdma_sc_qp *qp);
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enum irdma_status_code irdma_vf_wait_vchnl_resp(struct irdma_sc_dev *dev);
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bool irdma_vf_clear_to_send(struct irdma_sc_dev *dev);
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void irdma_add_dev_ref(struct irdma_sc_dev *dev);
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void irdma_put_dev_ref(struct irdma_sc_dev *dev);
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enum irdma_status_code irdma_ieq_check_mpacrc(struct shash_desc *desc,
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void *addr, u32 len, u32 val);
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struct irdma_sc_qp *irdma_ieq_get_qp(struct irdma_sc_dev *dev,
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struct irdma_puda_buf *buf);
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void irdma_send_ieq_ack(struct irdma_sc_qp *qp);
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void irdma_ieq_update_tcpip_info(struct irdma_puda_buf *buf, u16 len,
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u32 seqnum);
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void irdma_free_hash_desc(struct shash_desc *hash_desc);
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enum irdma_status_code irdma_init_hash_desc(struct shash_desc **hash_desc);
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enum irdma_status_code
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irdma_puda_get_tcpip_info(struct irdma_puda_cmpl_info *info,
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struct irdma_puda_buf *buf);
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enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
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struct irdma_update_sds_info *info);
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enum irdma_status_code
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irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
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struct irdma_hmc_fcn_info *hmcfcninfo,
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u16 *pmf_idx);
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enum irdma_status_code
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irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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enum irdma_status_code
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irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *mem);
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void *irdma_remove_cqp_head(struct irdma_sc_dev *dev);
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void irdma_term_modify_qp(struct irdma_sc_qp *qp, u8 next_state, u8 term,
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u8 term_len);
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void irdma_terminate_done(struct irdma_sc_qp *qp, int timeout_occurred);
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void irdma_terminate_start_timer(struct irdma_sc_qp *qp);
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void irdma_terminate_del_timer(struct irdma_sc_qp *qp);
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void irdma_hw_stats_start_timer(struct irdma_sc_vsi *vsi);
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void irdma_hw_stats_stop_timer(struct irdma_sc_vsi *vsi);
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void wr32(struct irdma_hw *hw, u32 reg, u32 val);
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u32 rd32(struct irdma_hw *hw, u32 reg);
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u64 rd64(struct irdma_hw *hw, u32 reg);
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enum irdma_status_code irdma_map_vm_page_list(struct irdma_hw *hw, void *va,
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dma_addr_t *pg_dma, u32 pg_cnt);
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void irdma_unmap_vm_page_list(struct irdma_hw *hw, dma_addr_t *pg_dma, u32 pg_cnt);
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#endif /* IRDMA_OSDEP_H */

‎drivers/infiniband/hw/irdma/protos.h‎

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/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2016 - 2021 Intel Corporation */
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#ifndef IRDMA_PROTOS_H
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#define IRDMA_PROTOS_H
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#define PAUSE_TIMER_VAL 0xffff
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#define REFRESH_THRESHOLD 0x7fff
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#define HIGH_THRESHOLD 0x800
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#define LOW_THRESHOLD 0x200
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#define ALL_TC2PFC 0xff
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#define CQP_COMPL_WAIT_TIME_MS 10
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#define CQP_TIMEOUT_THRESHOLD 500
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/* init operations */
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enum irdma_status_code irdma_sc_dev_init(enum irdma_vers ver,
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struct irdma_sc_dev *dev,
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struct irdma_device_init_info *info);
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void irdma_sc_rt_init(struct irdma_sc_dev *dev);
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void irdma_sc_cqp_post_sq(struct irdma_sc_cqp *cqp);
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__le64 *irdma_sc_cqp_get_next_send_wqe(struct irdma_sc_cqp *cqp, u64 scratch);
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enum irdma_status_code
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irdma_sc_mr_fast_register(struct irdma_sc_qp *qp,
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struct irdma_fast_reg_stag_info *info, bool post_sq);
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/* HMC/FPM functions */
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enum irdma_status_code irdma_sc_init_iw_hmc(struct irdma_sc_dev *dev,
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u8 hmc_fn_id);
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/* stats misc */
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enum irdma_status_code
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irdma_cqp_gather_stats_cmd(struct irdma_sc_dev *dev,
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struct irdma_vsi_pestat *pestat, bool wait);
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void irdma_cqp_gather_stats_gen1(struct irdma_sc_dev *dev,
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struct irdma_vsi_pestat *pestat);
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void irdma_hw_stats_read_all(struct irdma_vsi_pestat *stats,
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struct irdma_dev_hw_stats *stats_values,
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u64 *hw_stats_regs_32, u64 *hw_stats_regs_64,
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u8 hw_rev);
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enum irdma_status_code
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irdma_cqp_ws_node_cmd(struct irdma_sc_dev *dev, u8 cmd,
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struct irdma_ws_node_info *node_info);
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enum irdma_status_code irdma_cqp_up_map_cmd(struct irdma_sc_dev *dev, u8 cmd,
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struct irdma_up_info *map_info);
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enum irdma_status_code irdma_cqp_ceq_cmd(struct irdma_sc_dev *dev,
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struct irdma_sc_ceq *sc_ceq, u8 op);
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enum irdma_status_code irdma_cqp_aeq_cmd(struct irdma_sc_dev *dev,
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struct irdma_sc_aeq *sc_aeq, u8 op);
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enum irdma_status_code
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irdma_cqp_stats_inst_cmd(struct irdma_sc_vsi *vsi, u8 cmd,
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struct irdma_stats_inst_info *stats_info);
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u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev);
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void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id);
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void irdma_update_stats(struct irdma_dev_hw_stats *hw_stats,
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struct irdma_gather_stats *gather_stats,
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struct irdma_gather_stats *last_gather_stats);
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/* vsi functions */
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enum irdma_status_code irdma_vsi_stats_init(struct irdma_sc_vsi *vsi,
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struct irdma_vsi_stats_info *info);
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void irdma_vsi_stats_free(struct irdma_sc_vsi *vsi);
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void irdma_sc_vsi_init(struct irdma_sc_vsi *vsi,
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struct irdma_vsi_init_info *info);
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enum irdma_status_code irdma_sc_add_cq_ctx(struct irdma_sc_ceq *ceq,
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struct irdma_sc_cq *cq);
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void irdma_sc_remove_cq_ctx(struct irdma_sc_ceq *ceq, struct irdma_sc_cq *cq);
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/* misc L2 param change functions */
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void irdma_change_l2params(struct irdma_sc_vsi *vsi,
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struct irdma_l2params *l2params);
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void irdma_sc_suspend_resume_qps(struct irdma_sc_vsi *vsi, u8 suspend);
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enum irdma_status_code irdma_cqp_qp_suspend_resume(struct irdma_sc_qp *qp,
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u8 cmd);
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void irdma_qp_add_qos(struct irdma_sc_qp *qp);
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void irdma_qp_rem_qos(struct irdma_sc_qp *qp);
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struct irdma_sc_qp *irdma_get_qp_from_list(struct list_head *head,
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struct irdma_sc_qp *qp);
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void irdma_reinitialize_ieq(struct irdma_sc_vsi *vsi);
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u16 irdma_alloc_ws_node_id(struct irdma_sc_dev *dev);
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void irdma_free_ws_node_id(struct irdma_sc_dev *dev, u16 node_id);
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/* terminate functions*/
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void irdma_terminate_send_fin(struct irdma_sc_qp *qp);
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void irdma_terminate_connection(struct irdma_sc_qp *qp,
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struct irdma_aeqe_info *info);
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void irdma_terminate_received(struct irdma_sc_qp *qp,
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struct irdma_aeqe_info *info);
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/* dynamic memory allocation */
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/* misc */
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u8 irdma_get_encoded_wqe_size(u32 wqsize, enum irdma_queue_type queue_type);
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void irdma_modify_qp_to_err(struct irdma_sc_qp *sc_qp);
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enum irdma_status_code
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irdma_sc_static_hmc_pages_allocated(struct irdma_sc_cqp *cqp, u64 scratch,
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u8 hmc_fn_id, bool post_sq,
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bool poll_registers);
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enum irdma_status_code irdma_cfg_fpm_val(struct irdma_sc_dev *dev,
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u32 qp_count);
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enum irdma_status_code irdma_get_rdma_features(struct irdma_sc_dev *dev);
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void free_sd_mem(struct irdma_sc_dev *dev);
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enum irdma_status_code irdma_process_cqp_cmd(struct irdma_sc_dev *dev,
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struct cqp_cmds_info *pcmdinfo);
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enum irdma_status_code irdma_process_bh(struct irdma_sc_dev *dev);
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enum irdma_status_code irdma_cqp_sds_cmd(struct irdma_sc_dev *dev,
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struct irdma_update_sds_info *info);
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enum irdma_status_code
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irdma_cqp_query_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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enum irdma_status_code
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irdma_cqp_commit_fpm_val_cmd(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *val_mem, u8 hmc_fn_id);
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enum irdma_status_code irdma_alloc_query_fpm_buf(struct irdma_sc_dev *dev,
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struct irdma_dma_mem *mem);
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enum irdma_status_code
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irdma_cqp_manage_hmc_fcn_cmd(struct irdma_sc_dev *dev,
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struct irdma_hmc_fcn_info *hmcfcninfo,
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u16 *pmf_idx);
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void irdma_add_dev_ref(struct irdma_sc_dev *dev);
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void irdma_put_dev_ref(struct irdma_sc_dev *dev);
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void *irdma_remove_cqp_head(struct irdma_sc_dev *dev);
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#endif /* IRDMA_PROTOS_H */

‎drivers/infiniband/hw/irdma/status.h‎

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/* SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB */
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/* Copyright (c) 2015 - 2020 Intel Corporation */
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#ifndef IRDMA_STATUS_H
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#define IRDMA_STATUS_H
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/* Error Codes */
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enum irdma_status_code {
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IRDMA_SUCCESS = 0,
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IRDMA_ERR_NVM = -1,
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IRDMA_ERR_NVM_CHECKSUM = -2,
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IRDMA_ERR_CFG = -4,
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IRDMA_ERR_PARAM = -5,
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IRDMA_ERR_DEVICE_NOT_SUPPORTED = -6,
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IRDMA_ERR_RESET_FAILED = -7,
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IRDMA_ERR_SWFW_SYNC = -8,
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IRDMA_ERR_NO_MEMORY = -9,
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IRDMA_ERR_BAD_PTR = -10,
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IRDMA_ERR_INVALID_PD_ID = -11,
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IRDMA_ERR_INVALID_QP_ID = -12,
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IRDMA_ERR_INVALID_CQ_ID = -13,
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IRDMA_ERR_INVALID_CEQ_ID = -14,
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IRDMA_ERR_INVALID_AEQ_ID = -15,
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IRDMA_ERR_INVALID_SIZE = -16,
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IRDMA_ERR_INVALID_ARP_INDEX = -17,
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IRDMA_ERR_INVALID_FPM_FUNC_ID = -18,
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IRDMA_ERR_QP_INVALID_MSG_SIZE = -19,
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IRDMA_ERR_QP_TOOMANY_WRS_POSTED = -20,
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IRDMA_ERR_INVALID_FRAG_COUNT = -21,
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IRDMA_ERR_Q_EMPTY = -22,
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IRDMA_ERR_INVALID_ALIGNMENT = -23,
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IRDMA_ERR_FLUSHED_Q = -24,
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IRDMA_ERR_INVALID_PUSH_PAGE_INDEX = -25,
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IRDMA_ERR_INVALID_INLINE_DATA_SIZE = -26,
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IRDMA_ERR_TIMEOUT = -27,
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IRDMA_ERR_OPCODE_MISMATCH = -28,
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IRDMA_ERR_CQP_COMPL_ERROR = -29,
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IRDMA_ERR_INVALID_VF_ID = -30,
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IRDMA_ERR_INVALID_HMCFN_ID = -31,
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IRDMA_ERR_BACKING_PAGE_ERROR = -32,
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IRDMA_ERR_NO_PBLCHUNKS_AVAILABLE = -33,
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IRDMA_ERR_INVALID_PBLE_INDEX = -34,
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IRDMA_ERR_INVALID_SD_INDEX = -35,
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IRDMA_ERR_INVALID_PAGE_DESC_INDEX = -36,
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IRDMA_ERR_INVALID_SD_TYPE = -37,
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IRDMA_ERR_MEMCPY_FAILED = -38,
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IRDMA_ERR_INVALID_HMC_OBJ_INDEX = -39,
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IRDMA_ERR_INVALID_HMC_OBJ_COUNT = -40,
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IRDMA_ERR_BUF_TOO_SHORT = -43,
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IRDMA_ERR_BAD_IWARP_CQE = -44,
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IRDMA_ERR_NVM_BLANK_MODE = -45,
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IRDMA_ERR_NOT_IMPL = -46,
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IRDMA_ERR_PE_DOORBELL_NOT_ENA = -47,
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IRDMA_ERR_NOT_READY = -48,
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IRDMA_NOT_SUPPORTED = -49,
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IRDMA_ERR_FIRMWARE_API_VER = -50,
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IRDMA_ERR_RING_FULL = -51,
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IRDMA_ERR_MPA_CRC = -61,
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IRDMA_ERR_NO_TXBUFS = -62,
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IRDMA_ERR_SEQ_NUM = -63,
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IRDMA_ERR_list_empty = -64,
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IRDMA_ERR_INVALID_MAC_ADDR = -65,
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IRDMA_ERR_BAD_STAG = -66,
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IRDMA_ERR_CQ_COMPL_ERROR = -67,
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IRDMA_ERR_Q_DESTROYED = -68,
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IRDMA_ERR_INVALID_FEAT_CNT = -69,
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IRDMA_ERR_REG_CQ_FULL = -70,
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IRDMA_ERR_VF_MSG_ERROR = -71,
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IRDMA_ERR_NO_INTR = -72,
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IRDMA_ERR_REG_QSET = -73,
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};
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#endif /* IRDMA_STATUS_H */

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