|
| 1 | +/* |
| 2 | + * 8250_dma.c - DMA Engine API support for 8250.c |
| 3 | + * |
| 4 | + * Copyright (C) 2013 Intel Corporation |
| 5 | + * |
| 6 | + * This program is free software; you can redistribute it and/or modify |
| 7 | + * it under the terms of the GNU General Public License as published by |
| 8 | + * the Free Software Foundation; either version 2 of the License, or |
| 9 | + * (at your option) any later version. |
| 10 | + */ |
| 11 | +#include <linux/tty.h> |
| 12 | +#include <linux/tty_flip.h> |
| 13 | +#include <linux/serial_reg.h> |
| 14 | +#include <linux/dma-mapping.h> |
| 15 | + |
| 16 | +#include "8250.h" |
| 17 | + |
| 18 | +static void __dma_tx_complete(void *param) |
| 19 | +{ |
| 20 | + struct uart_8250_port *p = param; |
| 21 | + struct uart_8250_dma *dma = p->dma; |
| 22 | + struct circ_buf *xmit = &p->port.state->xmit; |
| 23 | + |
| 24 | + dma->tx_running = 0; |
| 25 | + |
| 26 | + dma_sync_single_for_cpu(dma->txchan->device->dev, dma->tx_addr, |
| 27 | + UART_XMIT_SIZE, DMA_TO_DEVICE); |
| 28 | + |
| 29 | + xmit->tail += dma->tx_size; |
| 30 | + xmit->tail &= UART_XMIT_SIZE - 1; |
| 31 | + p->port.icount.tx += dma->tx_size; |
| 32 | + |
| 33 | + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 34 | + uart_write_wakeup(&p->port); |
| 35 | + |
| 36 | + if (!uart_circ_empty(xmit) && !uart_tx_stopped(&p->port)) { |
| 37 | + serial8250_tx_dma(p); |
| 38 | + uart_write_wakeup(&p->port); |
| 39 | + } |
| 40 | +} |
| 41 | + |
| 42 | +static void __dma_rx_complete(void *param) |
| 43 | +{ |
| 44 | + struct uart_8250_port *p = param; |
| 45 | + struct uart_8250_dma *dma = p->dma; |
| 46 | + struct tty_struct *tty = p->port.state->port.tty; |
| 47 | + struct dma_tx_state state; |
| 48 | + |
| 49 | + dma_sync_single_for_cpu(dma->rxchan->device->dev, dma->rx_addr, |
| 50 | + dma->rx_size, DMA_FROM_DEVICE); |
| 51 | + |
| 52 | + dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state); |
| 53 | + dmaengine_terminate_all(dma->rxchan); |
| 54 | + |
| 55 | + tty_insert_flip_string(tty, dma->rx_buf, dma->rx_size - state.residue); |
| 56 | + p->port.icount.rx += dma->rx_size - state.residue; |
| 57 | + |
| 58 | + tty_flip_buffer_push(tty); |
| 59 | +} |
| 60 | + |
| 61 | +int serial8250_tx_dma(struct uart_8250_port *p) |
| 62 | +{ |
| 63 | + struct uart_8250_dma *dma = p->dma; |
| 64 | + struct circ_buf *xmit = &p->port.state->xmit; |
| 65 | + struct dma_async_tx_descriptor *desc; |
| 66 | + |
| 67 | + if (dma->tx_running) { |
| 68 | + uart_write_wakeup(&p->port); |
| 69 | + return -EBUSY; |
| 70 | + } |
| 71 | + |
| 72 | + dma->tx_size = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); |
| 73 | + |
| 74 | + desc = dmaengine_prep_slave_single(dma->txchan, |
| 75 | + dma->tx_addr + xmit->tail, |
| 76 | + dma->tx_size, DMA_MEM_TO_DEV, |
| 77 | + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 78 | + if (!desc) |
| 79 | + return -EBUSY; |
| 80 | + |
| 81 | + dma->tx_running = 1; |
| 82 | + |
| 83 | + desc->callback = __dma_tx_complete; |
| 84 | + desc->callback_param = p; |
| 85 | + |
| 86 | + dma->tx_cookie = dmaengine_submit(desc); |
| 87 | + |
| 88 | + dma_sync_single_for_device(dma->txchan->device->dev, dma->tx_addr, |
| 89 | + UART_XMIT_SIZE, DMA_TO_DEVICE); |
| 90 | + |
| 91 | + dma_async_issue_pending(dma->txchan); |
| 92 | + |
| 93 | + return 0; |
| 94 | +} |
| 95 | +EXPORT_SYMBOL_GPL(serial8250_tx_dma); |
| 96 | + |
| 97 | +int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) |
| 98 | +{ |
| 99 | + struct uart_8250_dma *dma = p->dma; |
| 100 | + struct dma_async_tx_descriptor *desc; |
| 101 | + struct dma_tx_state state; |
| 102 | + int dma_status; |
| 103 | + |
| 104 | + /* |
| 105 | + * If RCVR FIFO trigger level was not reached, complete the transfer and |
| 106 | + * let 8250.c copy the remaining data. |
| 107 | + */ |
| 108 | + if ((iir & 0x3f) == UART_IIR_RX_TIMEOUT) { |
| 109 | + dma_status = dmaengine_tx_status(dma->rxchan, dma->rx_cookie, |
| 110 | + &state); |
| 111 | + if (dma_status == DMA_IN_PROGRESS) { |
| 112 | + dmaengine_pause(dma->rxchan); |
| 113 | + __dma_rx_complete(p); |
| 114 | + } |
| 115 | + return -ETIMEDOUT; |
| 116 | + } |
| 117 | + |
| 118 | + desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr, |
| 119 | + dma->rx_size, DMA_DEV_TO_MEM, |
| 120 | + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 121 | + if (!desc) |
| 122 | + return -EBUSY; |
| 123 | + |
| 124 | + desc->callback = __dma_rx_complete; |
| 125 | + desc->callback_param = p; |
| 126 | + |
| 127 | + dma->rx_cookie = dmaengine_submit(desc); |
| 128 | + |
| 129 | + dma_sync_single_for_device(dma->rxchan->device->dev, dma->rx_addr, |
| 130 | + dma->rx_size, DMA_FROM_DEVICE); |
| 131 | + |
| 132 | + dma_async_issue_pending(dma->rxchan); |
| 133 | + |
| 134 | + return 0; |
| 135 | +} |
| 136 | +EXPORT_SYMBOL_GPL(serial8250_rx_dma); |
| 137 | + |
| 138 | +int serial8250_request_dma(struct uart_8250_port *p) |
| 139 | +{ |
| 140 | + struct uart_8250_dma *dma = p->dma; |
| 141 | + dma_cap_mask_t mask; |
| 142 | + |
| 143 | + dma->rxconf.src_addr = p->port.mapbase + UART_RX; |
| 144 | + dma->txconf.dst_addr = p->port.mapbase + UART_TX; |
| 145 | + |
| 146 | + dma_cap_zero(mask); |
| 147 | + dma_cap_set(DMA_SLAVE, mask); |
| 148 | + |
| 149 | + /* Get a channel for RX */ |
| 150 | + dma->rxchan = dma_request_channel(mask, dma->fn, dma->rx_param); |
| 151 | + if (!dma->rxchan) |
| 152 | + return -ENODEV; |
| 153 | + |
| 154 | + dmaengine_slave_config(dma->rxchan, &dma->rxconf); |
| 155 | + |
| 156 | + /* Get a channel for TX */ |
| 157 | + dma->txchan = dma_request_channel(mask, dma->fn, dma->tx_param); |
| 158 | + if (!dma->txchan) { |
| 159 | + dma_release_channel(dma->rxchan); |
| 160 | + return -ENODEV; |
| 161 | + } |
| 162 | + |
| 163 | + dmaengine_slave_config(dma->txchan, &dma->txconf); |
| 164 | + |
| 165 | + /* RX buffer */ |
| 166 | + if (!dma->rx_size) |
| 167 | + dma->rx_size = PAGE_SIZE; |
| 168 | + |
| 169 | + dma->rx_buf = dma_alloc_coherent(dma->rxchan->device->dev, dma->rx_size, |
| 170 | + &dma->rx_addr, GFP_KERNEL); |
| 171 | + if (!dma->rx_buf) { |
| 172 | + dma_release_channel(dma->rxchan); |
| 173 | + dma_release_channel(dma->txchan); |
| 174 | + return -ENOMEM; |
| 175 | + } |
| 176 | + |
| 177 | + /* TX buffer */ |
| 178 | + dma->tx_addr = dma_map_single(dma->txchan->device->dev, |
| 179 | + p->port.state->xmit.buf, |
| 180 | + UART_XMIT_SIZE, |
| 181 | + DMA_TO_DEVICE); |
| 182 | + |
| 183 | + dev_dbg_ratelimited(p->port.dev, "got both dma channels\n"); |
| 184 | + |
| 185 | + return 0; |
| 186 | +} |
| 187 | +EXPORT_SYMBOL_GPL(serial8250_request_dma); |
| 188 | + |
| 189 | +void serial8250_release_dma(struct uart_8250_port *p) |
| 190 | +{ |
| 191 | + struct uart_8250_dma *dma = p->dma; |
| 192 | + |
| 193 | + if (!dma) |
| 194 | + return; |
| 195 | + |
| 196 | + /* Release RX resources */ |
| 197 | + dmaengine_terminate_all(dma->rxchan); |
| 198 | + dma_free_coherent(dma->rxchan->device->dev, dma->rx_size, dma->rx_buf, |
| 199 | + dma->rx_addr); |
| 200 | + dma_release_channel(dma->rxchan); |
| 201 | + dma->rxchan = NULL; |
| 202 | + |
| 203 | + /* Release TX resources */ |
| 204 | + dmaengine_terminate_all(dma->txchan); |
| 205 | + dma_unmap_single(dma->txchan->device->dev, dma->tx_addr, |
| 206 | + UART_XMIT_SIZE, DMA_TO_DEVICE); |
| 207 | + dma_release_channel(dma->txchan); |
| 208 | + dma->txchan = NULL; |
| 209 | + dma->tx_running = 0; |
| 210 | + |
| 211 | + dev_dbg_ratelimited(p->port.dev, "dma channels released\n"); |
| 212 | +} |
| 213 | +EXPORT_SYMBOL_GPL(serial8250_release_dma); |
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