@@ -57,13 +57,19 @@ static void mt7996_dma_config(struct mt7996_dev *dev)
5757 RXQ_CONFIG (MT_RXQ_MCU , WFDMA0 , MT_INT_RX_DONE_WM , MT7996_RXQ_MCU_WM );
5858 RXQ_CONFIG (MT_RXQ_MCU_WA , WFDMA0 , MT_INT_RX_DONE_WA , MT7996_RXQ_MCU_WA );
5959
60- /* band0/ band1 */
60+ /* mt7996: band0 and band1, mt7992: band0 */
6161 RXQ_CONFIG (MT_RXQ_MAIN , WFDMA0 , MT_INT_RX_DONE_BAND0 , MT7996_RXQ_BAND0 );
6262 RXQ_CONFIG (MT_RXQ_MAIN_WA , WFDMA0 , MT_INT_RX_DONE_WA_MAIN , MT7996_RXQ_MCU_WA_MAIN );
6363
64- /* band2 */
65- RXQ_CONFIG (MT_RXQ_BAND2 , WFDMA0 , MT_INT_RX_DONE_BAND2 , MT7996_RXQ_BAND2 );
66- RXQ_CONFIG (MT_RXQ_BAND2_WA , WFDMA0 , MT_INT_RX_DONE_WA_TRI , MT7996_RXQ_MCU_WA_TRI );
64+ if (is_mt7996 (& dev -> mt76 )) {
65+ /* mt7996 band2 */
66+ RXQ_CONFIG (MT_RXQ_BAND2 , WFDMA0 , MT_INT_RX_DONE_BAND2 , MT7996_RXQ_BAND2 );
67+ RXQ_CONFIG (MT_RXQ_BAND2_WA , WFDMA0 , MT_INT_RX_DONE_WA_TRI , MT7996_RXQ_MCU_WA_TRI );
68+ } else {
69+ /* mt7992 band1 */
70+ RXQ_CONFIG (MT_RXQ_BAND1 , WFDMA0 , MT_INT_RX_DONE_BAND1 , MT7996_RXQ_BAND1 );
71+ RXQ_CONFIG (MT_RXQ_BAND1_WA , WFDMA0 , MT_INT_RX_DONE_WA_EXT , MT7996_RXQ_MCU_WA_EXT );
72+ }
6773
6874 if (dev -> has_rro ) {
6975 /* band0 */
@@ -90,8 +96,12 @@ static void mt7996_dma_config(struct mt7996_dev *dev)
9096
9197 /* data tx queue */
9298 TXQ_CONFIG (0 , WFDMA0 , MT_INT_TX_DONE_BAND0 , MT7996_TXQ_BAND0 );
93- TXQ_CONFIG (1 , WFDMA0 , MT_INT_TX_DONE_BAND1 , MT7996_TXQ_BAND1 );
94- TXQ_CONFIG (2 , WFDMA0 , MT_INT_TX_DONE_BAND2 , MT7996_TXQ_BAND2 );
99+ if (is_mt7996 (& dev -> mt76 )) {
100+ TXQ_CONFIG (1 , WFDMA0 , MT_INT_TX_DONE_BAND1 , MT7996_TXQ_BAND1 );
101+ TXQ_CONFIG (2 , WFDMA0 , MT_INT_TX_DONE_BAND2 , MT7996_TXQ_BAND2 );
102+ } else {
103+ TXQ_CONFIG (1 , WFDMA0 , MT_INT_TX_DONE_BAND1 , MT7996_TXQ_BAND1 );
104+ }
95105
96106 /* mcu tx queue */
97107 MCUQ_CONFIG (MT_MCUQ_WM , WFDMA0 , MT_INT_TX_DONE_MCU_WM , MT7996_TXQ_MCU_WM );
@@ -111,6 +121,7 @@ static u32 __mt7996_dma_prefetch_base(u16 *base, u8 depth)
111121static void __mt7996_dma_prefetch (struct mt7996_dev * dev , u32 ofs )
112122{
113123 u16 base = 0 ;
124+ u8 queue ;
114125
115126#define PREFETCH (_depth ) (__mt7996_dma_prefetch_base(&base, (_depth)))
116127 /* prefetch SRAM wrapping boundary for tx/rx ring. */
@@ -123,9 +134,14 @@ static void __mt7996_dma_prefetch(struct mt7996_dev *dev, u32 ofs)
123134 mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_MCU ) + ofs , PREFETCH (0x2 ));
124135 mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_MCU_WA ) + ofs , PREFETCH (0x2 ));
125136 mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_MAIN_WA ) + ofs , PREFETCH (0x2 ));
126- mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_BAND2_WA ) + ofs , PREFETCH (0x2 ));
137+
138+ queue = is_mt7996 (& dev -> mt76 ) ? MT_RXQ_BAND2_WA : MT_RXQ_BAND1_WA ;
139+ mt76_wr (dev , MT_RXQ_BAND1_CTRL (queue ) + ofs , PREFETCH (0x2 ));
140+
127141 mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_MAIN ) + ofs , PREFETCH (0x10 ));
128- mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_BAND2 ) + ofs , PREFETCH (0x10 ));
142+
143+ queue = is_mt7996 (& dev -> mt76 ) ? MT_RXQ_BAND2 : MT_RXQ_BAND1 ;
144+ mt76_wr (dev , MT_RXQ_BAND1_CTRL (queue ) + ofs , PREFETCH (0x10 ));
129145
130146 if (dev -> has_rro ) {
131147 mt76_wr (dev , MT_RXQ_BAND1_CTRL (MT_RXQ_RRO_BAND0 ) + ofs ,
@@ -488,7 +504,7 @@ int mt7996_dma_init(struct mt7996_dev *dev)
488504 if (ret )
489505 return ret ;
490506
491- /* rx data queue for band0 and band1 */
507+ /* rx data queue for band0 and mt7996 band1 */
492508 if (mtk_wed_device_active (wed ) && mtk_wed_get_rx_capa (wed )) {
493509 dev -> mt76 .q_rx [MT_RXQ_MAIN ].flags = MT_WED_Q_RX (0 );
494510 dev -> mt76 .q_rx [MT_RXQ_MAIN ].wed = wed ;
@@ -517,7 +533,7 @@ int mt7996_dma_init(struct mt7996_dev *dev)
517533 return ret ;
518534
519535 if (mt7996_band_valid (dev , MT_BAND2 )) {
520- /* rx data queue for band2 */
536+ /* rx data queue for mt7996 band2 */
521537 rx_base = MT_RXQ_RING_BASE (MT_RXQ_BAND2 ) + hif1_ofs ;
522538 ret = mt76_queue_alloc (dev , & dev -> mt76 .q_rx [MT_RXQ_BAND2 ],
523539 MT_RXQ_ID (MT_RXQ_BAND2 ),
@@ -527,7 +543,7 @@ int mt7996_dma_init(struct mt7996_dev *dev)
527543 if (ret )
528544 return ret ;
529545
530- /* tx free notify event from WA for band2
546+ /* tx free notify event from WA for mt7996 band2
531547 * use pcie0's rx ring3, but, redirect pcie0 rx ring3 interrupt to pcie1
532548 */
533549 if (mtk_wed_device_active (wed_hif2 ) && !dev -> has_rro ) {
@@ -542,6 +558,26 @@ int mt7996_dma_init(struct mt7996_dev *dev)
542558 MT_RXQ_RING_BASE (MT_RXQ_BAND2_WA ));
543559 if (ret )
544560 return ret ;
561+ } else if (mt7996_band_valid (dev , MT_BAND1 )) {
562+ /* rx data queue for mt7992 band1 */
563+ rx_base = MT_RXQ_RING_BASE (MT_RXQ_BAND1 ) + hif1_ofs ;
564+ ret = mt76_queue_alloc (dev , & dev -> mt76 .q_rx [MT_RXQ_BAND1 ],
565+ MT_RXQ_ID (MT_RXQ_BAND1 ),
566+ MT7996_RX_RING_SIZE ,
567+ MT_RX_BUF_SIZE ,
568+ rx_base );
569+ if (ret )
570+ return ret ;
571+
572+ /* tx free notify event from WA for mt7992 band1 */
573+ rx_base = MT_RXQ_RING_BASE (MT_RXQ_BAND1_WA ) + hif1_ofs ;
574+ ret = mt76_queue_alloc (dev , & dev -> mt76 .q_rx [MT_RXQ_BAND1_WA ],
575+ MT_RXQ_ID (MT_RXQ_BAND1_WA ),
576+ MT7996_RX_MCU_RING_SIZE ,
577+ MT_RX_BUF_SIZE ,
578+ rx_base );
579+ if (ret )
580+ return ret ;
545581 }
546582
547583 if (mtk_wed_device_active (wed ) && mtk_wed_get_rx_capa (wed ) &&
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