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Lijo Lazaralexdeucher
Lijo Lazar
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alexdeucher
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drm/amdgpu: Convert from DRM_* to dev_*
Convert from generic DRM_* to dev_* calls to have device context info. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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12 files changed

+320
-219
lines changed

12 files changed

+320
-219
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 167 additions & 104 deletions
Large diffs are not rendered by default.

‎drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c‎

Lines changed: 10 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,8 @@ u32 amdgpu_mm_rdoorbell(struct amdgpu_device *adev, u32 index)
4141
if (index < adev->doorbell.num_kernel_doorbells)
4242
return readl(adev->doorbell.cpu_addr + index);
4343

44-
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
44+
dev_err(adev->dev, "reading beyond doorbell aperture: 0x%08x!\n",
45+
index);
4546
return 0;
4647
}
4748

@@ -63,7 +64,8 @@ void amdgpu_mm_wdoorbell(struct amdgpu_device *adev, u32 index, u32 v)
6364
if (index < adev->doorbell.num_kernel_doorbells)
6465
writel(v, adev->doorbell.cpu_addr + index);
6566
else
66-
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
67+
dev_err(adev->dev,
68+
"writing beyond doorbell aperture: 0x%08x!\n", index);
6769
}
6870

6971
/**
@@ -83,7 +85,8 @@ u64 amdgpu_mm_rdoorbell64(struct amdgpu_device *adev, u32 index)
8385
if (index < adev->doorbell.num_kernel_doorbells)
8486
return atomic64_read((atomic64_t *)(adev->doorbell.cpu_addr + index));
8587

86-
DRM_ERROR("reading beyond doorbell aperture: 0x%08x!\n", index);
88+
dev_err(adev->dev, "reading beyond doorbell aperture: 0x%08x!\n",
89+
index);
8790
return 0;
8891
}
8992

@@ -105,7 +108,8 @@ void amdgpu_mm_wdoorbell64(struct amdgpu_device *adev, u32 index, u64 v)
105108
if (index < adev->doorbell.num_kernel_doorbells)
106109
atomic64_set((atomic64_t *)(adev->doorbell.cpu_addr + index), v);
107110
else
108-
DRM_ERROR("writing beyond doorbell aperture: 0x%08x!\n", index);
111+
dev_err(adev->dev,
112+
"writing beyond doorbell aperture: 0x%08x!\n", index);
109113
}
110114

111115
/**
@@ -166,7 +170,8 @@ int amdgpu_doorbell_create_kernel_doorbells(struct amdgpu_device *adev)
166170
NULL,
167171
(void **)&adev->doorbell.cpu_addr);
168172
if (r) {
169-
DRM_ERROR("Failed to allocate kernel doorbells, err=%d\n", r);
173+
dev_err(adev->dev,
174+
"Failed to allocate kernel doorbells, err=%d\n", r);
170175
return r;
171176
}
172177

‎drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -295,7 +295,9 @@ static void amdgpu_fence_fallback(struct timer_list *t)
295295
fence_drv.fallback_timer);
296296

297297
if (amdgpu_fence_process(ring))
298-
DRM_WARN("Fence fallback timer expired on ring %s\n", ring->name);
298+
dev_warn(ring->adev->dev,
299+
"Fence fallback timer expired on ring %s\n",
300+
ring->name);
299301
}
300302

301303
/**

‎drivers/gpu/drm/amd/amdgpu/amdgpu_fru_eeprom.c‎

Lines changed: 16 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -144,27 +144,31 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
144144

145145
/* If algo exists, it means that the i2c_adapter's initialized */
146146
if (!adev->pm.fru_eeprom_i2c_bus || !adev->pm.fru_eeprom_i2c_bus->algo) {
147-
DRM_WARN("Cannot access FRU, EEPROM accessor not initialized");
147+
dev_warn(adev->dev,
148+
"Cannot access FRU, EEPROM accessor not initialized");
148149
return -ENODEV;
149150
}
150151

151152
/* Read the IPMI Common header */
152153
len = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, fru_addr, buf,
153154
sizeof(buf));
154155
if (len != 8) {
155-
DRM_ERROR("Couldn't read the IPMI Common Header: %d", len);
156+
dev_err(adev->dev, "Couldn't read the IPMI Common Header: %d",
157+
len);
156158
return len < 0 ? len : -EIO;
157159
}
158160

159161
if (buf[0] != 1) {
160-
DRM_ERROR("Bad IPMI Common Header version: 0x%02x", buf[0]);
162+
dev_err(adev->dev, "Bad IPMI Common Header version: 0x%02x",
163+
buf[0]);
161164
return -EIO;
162165
}
163166

164167
for (csum = 0; len > 0; len--)
165168
csum += buf[len - 1];
166169
if (csum) {
167-
DRM_ERROR("Bad IPMI Common Header checksum: 0x%02x", csum);
170+
dev_err(adev->dev, "Bad IPMI Common Header checksum: 0x%02x",
171+
csum);
168172
return -EIO;
169173
}
170174

@@ -179,12 +183,14 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
179183
/* Read the header of the PIA. */
180184
len = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addr, buf, 3);
181185
if (len != 3) {
182-
DRM_ERROR("Couldn't read the Product Info Area header: %d", len);
186+
dev_err(adev->dev,
187+
"Couldn't read the Product Info Area header: %d", len);
183188
return len < 0 ? len : -EIO;
184189
}
185190

186191
if (buf[0] != 1) {
187-
DRM_ERROR("Bad IPMI Product Info Area version: 0x%02x", buf[0]);
192+
dev_err(adev->dev, "Bad IPMI Product Info Area version: 0x%02x",
193+
buf[0]);
188194
return -EIO;
189195
}
190196

@@ -197,14 +203,16 @@ int amdgpu_fru_get_product_info(struct amdgpu_device *adev)
197203
len = amdgpu_eeprom_read(adev->pm.fru_eeprom_i2c_bus, addr, pia, size);
198204
if (len != size) {
199205
kfree(pia);
200-
DRM_ERROR("Couldn't read the Product Info Area: %d", len);
206+
dev_err(adev->dev, "Couldn't read the Product Info Area: %d",
207+
len);
201208
return len < 0 ? len : -EIO;
202209
}
203210

204211
for (csum = 0; size > 0; size--)
205212
csum += pia[size - 1];
206213
if (csum) {
207-
DRM_ERROR("Bad Product Info Area checksum: 0x%02x", csum);
214+
dev_err(adev->dev, "Bad Product Info Area checksum: 0x%02x",
215+
csum);
208216
kfree(pia);
209217
return -EIO;
210218
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ static bool amdgpu_gfx_is_graphics_multipipe_capable(struct amdgpu_device *adev)
149149
static bool amdgpu_gfx_is_compute_multipipe_capable(struct amdgpu_device *adev)
150150
{
151151
if (amdgpu_compute_multipipe != -1) {
152-
DRM_INFO("amdgpu: forcing compute pipe policy %d\n",
152+
dev_info(adev->dev, "amdgpu: forcing compute pipe policy %d\n",
153153
amdgpu_compute_multipipe);
154154
return amdgpu_compute_multipipe == 1;
155155
}
@@ -674,7 +674,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
674674
* generation exposes more than 64 queues. If so, the
675675
* definition of queue_mask needs updating */
676676
if (WARN_ON(i > (sizeof(queue_mask)*8))) {
677-
DRM_ERROR("Invalid KCQ enabled: %d\n", i);
677+
dev_err(adev->dev, "Invalid KCQ enabled: %d\n", i);
678678
break;
679679
}
680680

@@ -683,15 +683,15 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
683683

684684
amdgpu_device_flush_hdp(adev, NULL);
685685

686-
DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
687-
kiq_ring->queue);
686+
dev_info(adev->dev, "kiq ring mec %d pipe %d q %d\n", kiq_ring->me,
687+
kiq_ring->pipe, kiq_ring->queue);
688688

689689
spin_lock(&kiq->ring_lock);
690690
r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
691691
adev->gfx.num_compute_rings +
692692
kiq->pmf->set_resources_size);
693693
if (r) {
694-
DRM_ERROR("Failed to lock KIQ (%d).\n", r);
694+
dev_err(adev->dev, "Failed to lock KIQ (%d).\n", r);
695695
spin_unlock(&kiq->ring_lock);
696696
return r;
697697
}
@@ -712,7 +712,7 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
712712
r = amdgpu_ring_test_helper(kiq_ring);
713713
spin_unlock(&kiq->ring_lock);
714714
if (r)
715-
DRM_ERROR("KCQ enable failed\n");
715+
dev_err(adev->dev, "KCQ enable failed\n");
716716

717717
return r;
718718
}
@@ -734,7 +734,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
734734
r = amdgpu_mes_map_legacy_queue(adev,
735735
&adev->gfx.gfx_ring[j]);
736736
if (r) {
737-
DRM_ERROR("failed to map gfx queue\n");
737+
dev_err(adev->dev, "failed to map gfx queue\n");
738738
return r;
739739
}
740740
}
@@ -748,7 +748,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
748748
r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
749749
adev->gfx.num_gfx_rings);
750750
if (r) {
751-
DRM_ERROR("Failed to lock KIQ (%d).\n", r);
751+
dev_err(adev->dev, "Failed to lock KIQ (%d).\n", r);
752752
spin_unlock(&kiq->ring_lock);
753753
return r;
754754
}
@@ -769,7 +769,7 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
769769
r = amdgpu_ring_test_helper(kiq_ring);
770770
spin_unlock(&kiq->ring_lock);
771771
if (r)
772-
DRM_ERROR("KGQ enable failed\n");
772+
dev_err(adev->dev, "KGQ enable failed\n");
773773

774774
return r;
775775
}
@@ -1030,7 +1030,7 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev,
10301030

10311031
ih_data.head = *ras_if;
10321032

1033-
DRM_ERROR("CP ECC ERROR IRQ\n");
1033+
dev_err(adev->dev, "CP ECC ERROR IRQ\n");
10341034
amdgpu_ras_interrupt_dispatch(adev, &ih_data);
10351035
return 0;
10361036
}

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -218,7 +218,7 @@ int amdgpu_ih_process(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih)
218218

219219
restart_ih:
220220
count = AMDGPU_IH_MAX_NUM_IVS;
221-
DRM_DEBUG("%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr);
221+
dev_dbg(adev->dev, "%s: rptr %d, wptr %d\n", __func__, ih->rptr, wptr);
222222

223223
/* Order reading of wptr vs. reading of IH ring data */
224224
rmb();

‎drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c‎

Lines changed: 14 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -142,8 +142,9 @@ void amdgpu_irq_disable_all(struct amdgpu_device *adev)
142142
r = src->funcs->set(adev, src, k,
143143
AMDGPU_IRQ_STATE_DISABLE);
144144
if (r)
145-
DRM_ERROR("error disabling interrupt (%d)\n",
146-
r);
145+
dev_err(adev->dev,
146+
"error disabling interrupt (%d)\n",
147+
r);
147148
}
148149
}
149150
}
@@ -315,7 +316,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
315316
adev->irq.irq = irq;
316317
adev_to_drm(adev)->max_vblank_count = 0x00ffffff;
317318

318-
DRM_DEBUG("amdgpu: irq initialized.\n");
319+
dev_dbg(adev->dev, "amdgpu: irq initialized.\n");
319320
return 0;
320321

321322
free_vectors:
@@ -461,29 +462,32 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
461462
src_id = entry.src_id;
462463

463464
if (client_id >= AMDGPU_IRQ_CLIENTID_MAX) {
464-
DRM_DEBUG("Invalid client_id in IV: %d\n", client_id);
465+
dev_dbg(adev->dev, "Invalid client_id in IV: %d\n", client_id);
465466

466467
} else if (src_id >= AMDGPU_MAX_IRQ_SRC_ID) {
467-
DRM_DEBUG("Invalid src_id in IV: %d\n", src_id);
468+
dev_dbg(adev->dev, "Invalid src_id in IV: %d\n", src_id);
468469

469470
} else if (((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) ||
470471
(client_id == SOC15_IH_CLIENTID_ISP)) &&
471472
adev->irq.virq[src_id]) {
472473
generic_handle_domain_irq(adev->irq.domain, src_id);
473474

474475
} else if (!adev->irq.client[client_id].sources) {
475-
DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",
476-
client_id, src_id);
476+
dev_dbg(adev->dev,
477+
"Unregistered interrupt client_id: %d src_id: %d\n",
478+
client_id, src_id);
477479

478480
} else if ((src = adev->irq.client[client_id].sources[src_id])) {
479481
r = src->funcs->process(adev, src, &entry);
480482
if (r < 0)
481-
DRM_ERROR("error processing interrupt (%d)\n", r);
483+
dev_err(adev->dev, "error processing interrupt (%d)\n",
484+
r);
482485
else if (r)
483486
handled = true;
484487

485488
} else {
486-
DRM_DEBUG("Unregistered interrupt src_id: %d of client_id:%d\n",
489+
dev_dbg(adev->dev,
490+
"Unregistered interrupt src_id: %d of client_id:%d\n",
487491
src_id, client_id);
488492
}
489493

@@ -732,7 +736,7 @@ int amdgpu_irq_add_domain(struct amdgpu_device *adev)
732736
adev->irq.domain = irq_domain_add_linear(NULL, AMDGPU_MAX_IRQ_SRC_ID,
733737
&amdgpu_hw_irqdomain_ops, adev);
734738
if (!adev->irq.domain) {
735-
DRM_ERROR("GPU irq add domain failed\n");
739+
dev_err(adev->dev, "GPU irq add domain failed\n");
736740
return -ENODEV;
737741
}
738742

‎drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -463,7 +463,8 @@ int amdgpu_jpeg_reg_dump_init(struct amdgpu_device *adev,
463463
adev->jpeg.ip_dump = kcalloc(adev->jpeg.num_jpeg_inst * count,
464464
sizeof(uint32_t), GFP_KERNEL);
465465
if (!adev->jpeg.ip_dump) {
466-
DRM_ERROR("Failed to allocate memory for JPEG IP Dump\n");
466+
dev_err(adev->dev,
467+
"Failed to allocate memory for JPEG IP Dump\n");
467468
return -ENOMEM;
468469
}
469470
adev->jpeg.reg_list = reg;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c‎

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
4747
/* Bitmap for dynamic allocation of kernel doorbells */
4848
mes->doorbell_bitmap = bitmap_zalloc(PAGE_SIZE / sizeof(u32), GFP_KERNEL);
4949
if (!mes->doorbell_bitmap) {
50-
DRM_ERROR("Failed to allocate MES doorbell bitmap\n");
50+
dev_err(adev->dev, "Failed to allocate MES doorbell bitmap\n");
5151
return -ENOMEM;
5252
}
5353

@@ -256,7 +256,7 @@ int amdgpu_mes_suspend(struct amdgpu_device *adev)
256256
r = adev->mes.funcs->suspend_gang(&adev->mes, &input);
257257
amdgpu_mes_unlock(&adev->mes);
258258
if (r)
259-
DRM_ERROR("failed to suspend all gangs");
259+
dev_err(adev->dev, "failed to suspend all gangs");
260260

261261
return r;
262262
}
@@ -280,7 +280,7 @@ int amdgpu_mes_resume(struct amdgpu_device *adev)
280280
r = adev->mes.funcs->resume_gang(&adev->mes, &input);
281281
amdgpu_mes_unlock(&adev->mes);
282282
if (r)
283-
DRM_ERROR("failed to resume all gangs");
283+
dev_err(adev->dev, "failed to resume all gangs");
284284

285285
return r;
286286
}
@@ -304,7 +304,7 @@ int amdgpu_mes_map_legacy_queue(struct amdgpu_device *adev,
304304
r = adev->mes.funcs->map_legacy_queue(&adev->mes, &queue_input);
305305
amdgpu_mes_unlock(&adev->mes);
306306
if (r)
307-
DRM_ERROR("failed to map legacy queue\n");
307+
dev_err(adev->dev, "failed to map legacy queue\n");
308308

309309
return r;
310310
}
@@ -329,7 +329,7 @@ int amdgpu_mes_unmap_legacy_queue(struct amdgpu_device *adev,
329329
r = adev->mes.funcs->unmap_legacy_queue(&adev->mes, &queue_input);
330330
amdgpu_mes_unlock(&adev->mes);
331331
if (r)
332-
DRM_ERROR("failed to unmap legacy queue\n");
332+
dev_err(adev->dev, "failed to unmap legacy queue\n");
333333

334334
return r;
335335
}
@@ -361,7 +361,7 @@ int amdgpu_mes_reset_legacy_queue(struct amdgpu_device *adev,
361361
r = adev->mes.funcs->reset_hw_queue(&adev->mes, &queue_input);
362362
amdgpu_mes_unlock(&adev->mes);
363363
if (r)
364-
DRM_ERROR("failed to reset legacy queue\n");
364+
dev_err(adev->dev, "failed to reset legacy queue\n");
365365

366366
return r;
367367
}
@@ -469,7 +469,8 @@ int amdgpu_mes_set_shader_debugger(struct amdgpu_device *adev,
469469
int r;
470470

471471
if (!adev->mes.funcs->misc_op) {
472-
DRM_ERROR("mes set shader debugger is not supported!\n");
472+
dev_err(adev->dev,
473+
"mes set shader debugger is not supported!\n");
473474
return -EINVAL;
474475
}
475476

@@ -493,7 +494,7 @@ int amdgpu_mes_set_shader_debugger(struct amdgpu_device *adev,
493494

494495
r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
495496
if (r)
496-
DRM_ERROR("failed to set_shader_debugger\n");
497+
dev_err(adev->dev, "failed to set_shader_debugger\n");
497498

498499
amdgpu_mes_unlock(&adev->mes);
499500

@@ -507,7 +508,8 @@ int amdgpu_mes_flush_shader_debugger(struct amdgpu_device *adev,
507508
int r;
508509

509510
if (!adev->mes.funcs->misc_op) {
510-
DRM_ERROR("mes flush shader debugger is not supported!\n");
511+
dev_err(adev->dev,
512+
"mes flush shader debugger is not supported!\n");
511513
return -EINVAL;
512514
}
513515

@@ -519,7 +521,7 @@ int amdgpu_mes_flush_shader_debugger(struct amdgpu_device *adev,
519521

520522
r = adev->mes.funcs->misc_op(&adev->mes, &op_input);
521523
if (r)
522-
DRM_ERROR("failed to set_shader_debugger\n");
524+
dev_err(adev->dev, "failed to set_shader_debugger\n");
523525

524526
amdgpu_mes_unlock(&adev->mes);
525527

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