@@ -39,38 +39,43 @@ static int bnxt_queue_to_tc(struct bnxt *bp, u8 queue_id)
3939
4040static int bnxt_hwrm_queue_pri2cos_cfg (struct bnxt * bp , struct ieee_ets * ets )
4141{
42- struct hwrm_queue_pri2cos_cfg_input req = { 0 } ;
42+ struct hwrm_queue_pri2cos_cfg_input * req ;
4343 u8 * pri2cos ;
44- int i ;
44+ int rc , i ;
45+
46+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_PRI2COS_CFG );
47+ if (rc )
48+ return rc ;
4549
46- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_PRI2COS_CFG , -1 , -1 );
47- req .flags = cpu_to_le32 (QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR |
48- QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN );
50+ req -> flags = cpu_to_le32 (QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR |
51+ QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN );
4952
50- pri2cos = & req . pri0_cos_queue_id ;
53+ pri2cos = & req -> pri0_cos_queue_id ;
5154 for (i = 0 ; i < IEEE_8021QAZ_MAX_TCS ; i ++ ) {
5255 u8 qidx ;
5356
54- req . enables |= cpu_to_le32 (
57+ req -> enables |= cpu_to_le32 (
5558 QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI0_COS_QUEUE_ID << i );
5659
5760 qidx = bp -> tc_to_qidx [ets -> prio_tc [i ]];
5861 pri2cos [i ] = bp -> q_info [qidx ].queue_id ;
5962 }
60- return hwrm_send_message (bp , & req , sizeof ( req ), HWRM_CMD_TIMEOUT );
63+ return hwrm_req_send (bp , req );
6164}
6265
6366static int bnxt_hwrm_queue_pri2cos_qcfg (struct bnxt * bp , struct ieee_ets * ets )
6467{
65- struct hwrm_queue_pri2cos_qcfg_output * resp = bp -> hwrm_cmd_resp_addr ;
66- struct hwrm_queue_pri2cos_qcfg_input req = { 0 } ;
67- int rc = 0 ;
68+ struct hwrm_queue_pri2cos_qcfg_output * resp ;
69+ struct hwrm_queue_pri2cos_qcfg_input * req ;
70+ int rc ;
6871
69- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_PRI2COS_QCFG , -1 , -1 );
70- req .flags = cpu_to_le32 (QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN );
72+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_PRI2COS_QCFG );
73+ if (rc )
74+ return rc ;
7175
72- mutex_lock (& bp -> hwrm_cmd_lock );
73- rc = _hwrm_send_message (bp , & req , sizeof (req ), HWRM_CMD_TIMEOUT );
76+ req -> flags = cpu_to_le32 (QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN );
77+ resp = hwrm_req_hold (bp , req );
78+ rc = hwrm_req_send (bp , req );
7479 if (!rc ) {
7580 u8 * pri2cos = & resp -> pri0_cos_queue_id ;
7681 int i ;
@@ -84,23 +89,26 @@ static int bnxt_hwrm_queue_pri2cos_qcfg(struct bnxt *bp, struct ieee_ets *ets)
8489 ets -> prio_tc [i ] = tc ;
8590 }
8691 }
87- mutex_unlock ( & bp -> hwrm_cmd_lock );
92+ hwrm_req_drop ( bp , req );
8893 return rc ;
8994}
9095
9196static int bnxt_hwrm_queue_cos2bw_cfg (struct bnxt * bp , struct ieee_ets * ets ,
9297 u8 max_tc )
9398{
94- struct hwrm_queue_cos2bw_cfg_input req = { 0 } ;
99+ struct hwrm_queue_cos2bw_cfg_input * req ;
95100 struct bnxt_cos2bw_cfg cos2bw ;
96101 void * data ;
97- int i ;
102+ int rc , i ;
103+
104+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_COS2BW_CFG );
105+ if (rc )
106+ return rc ;
98107
99- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_COS2BW_CFG , -1 , -1 );
100108 for (i = 0 ; i < max_tc ; i ++ ) {
101109 u8 qidx = bp -> tc_to_qidx [i ];
102110
103- req . enables |= cpu_to_le32 (
111+ req -> enables |= cpu_to_le32 (
104112 QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID0_VALID <<
105113 qidx );
106114
@@ -121,30 +129,32 @@ static int bnxt_hwrm_queue_cos2bw_cfg(struct bnxt *bp, struct ieee_ets *ets,
121129 cpu_to_le32 ((ets -> tc_tx_bw [i ] * 100 ) |
122130 BW_VALUE_UNIT_PERCENT1_100 );
123131 }
124- data = & req . unused_0 + qidx * (sizeof (cos2bw ) - 4 );
132+ data = & req -> unused_0 + qidx * (sizeof (cos2bw ) - 4 );
125133 memcpy (data , & cos2bw .queue_id , sizeof (cos2bw ) - 4 );
126134 if (qidx == 0 ) {
127- req . queue_id0 = cos2bw .queue_id ;
128- req . unused_0 = 0 ;
135+ req -> queue_id0 = cos2bw .queue_id ;
136+ req -> unused_0 = 0 ;
129137 }
130138 }
131- return hwrm_send_message (bp , & req , sizeof ( req ), HWRM_CMD_TIMEOUT );
139+ return hwrm_req_send (bp , req );
132140}
133141
134142static int bnxt_hwrm_queue_cos2bw_qcfg (struct bnxt * bp , struct ieee_ets * ets )
135143{
136- struct hwrm_queue_cos2bw_qcfg_output * resp = bp -> hwrm_cmd_resp_addr ;
137- struct hwrm_queue_cos2bw_qcfg_input req = { 0 } ;
144+ struct hwrm_queue_cos2bw_qcfg_output * resp ;
145+ struct hwrm_queue_cos2bw_qcfg_input * req ;
138146 struct bnxt_cos2bw_cfg cos2bw ;
139147 void * data ;
140148 int rc , i ;
141149
142- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_COS2BW_QCFG , -1 , -1 );
150+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_COS2BW_QCFG );
151+ if (rc )
152+ return rc ;
143153
144- mutex_lock ( & bp -> hwrm_cmd_lock );
145- rc = _hwrm_send_message (bp , & req , sizeof ( req ), HWRM_CMD_TIMEOUT );
154+ resp = hwrm_req_hold ( bp , req );
155+ rc = hwrm_req_send (bp , req );
146156 if (rc ) {
147- mutex_unlock ( & bp -> hwrm_cmd_lock );
157+ hwrm_req_drop ( bp , req );
148158 return rc ;
149159 }
150160
@@ -168,7 +178,7 @@ static int bnxt_hwrm_queue_cos2bw_qcfg(struct bnxt *bp, struct ieee_ets *ets)
168178 ets -> tc_tx_bw [tc ] = cos2bw .bw_weight ;
169179 }
170180 }
171- mutex_unlock ( & bp -> hwrm_cmd_lock );
181+ hwrm_req_drop ( bp , req );
172182 return 0 ;
173183}
174184
@@ -230,11 +240,12 @@ static int bnxt_queue_remap(struct bnxt *bp, unsigned int lltc_mask)
230240
231241static int bnxt_hwrm_queue_pfc_cfg (struct bnxt * bp , struct ieee_pfc * pfc )
232242{
233- struct hwrm_queue_pfcenable_cfg_input req = { 0 } ;
243+ struct hwrm_queue_pfcenable_cfg_input * req ;
234244 struct ieee_ets * my_ets = bp -> ieee_ets ;
235245 unsigned int tc_mask = 0 , pri_mask = 0 ;
236246 u8 i , pri , lltc_count = 0 ;
237247 bool need_q_remap = false;
248+ int rc ;
238249
239250 if (!my_ets )
240251 return - EINVAL ;
@@ -267,38 +278,43 @@ static int bnxt_hwrm_queue_pfc_cfg(struct bnxt *bp, struct ieee_pfc *pfc)
267278 if (need_q_remap )
268279 bnxt_queue_remap (bp , tc_mask );
269280
270- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_PFCENABLE_CFG , -1 , -1 );
271- req .flags = cpu_to_le32 (pri_mask );
272- return hwrm_send_message (bp , & req , sizeof (req ), HWRM_CMD_TIMEOUT );
281+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_PFCENABLE_CFG );
282+ if (rc )
283+ return rc ;
284+
285+ req -> flags = cpu_to_le32 (pri_mask );
286+ return hwrm_req_send (bp , req );
273287}
274288
275289static int bnxt_hwrm_queue_pfc_qcfg (struct bnxt * bp , struct ieee_pfc * pfc )
276290{
277- struct hwrm_queue_pfcenable_qcfg_output * resp = bp -> hwrm_cmd_resp_addr ;
278- struct hwrm_queue_pfcenable_qcfg_input req = { 0 } ;
291+ struct hwrm_queue_pfcenable_qcfg_output * resp ;
292+ struct hwrm_queue_pfcenable_qcfg_input * req ;
279293 u8 pri_mask ;
280294 int rc ;
281295
282- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_PFCENABLE_QCFG , -1 , -1 );
296+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_PFCENABLE_QCFG );
297+ if (rc )
298+ return rc ;
283299
284- mutex_lock ( & bp -> hwrm_cmd_lock );
285- rc = _hwrm_send_message (bp , & req , sizeof ( req ), HWRM_CMD_TIMEOUT );
300+ resp = hwrm_req_hold ( bp , req );
301+ rc = hwrm_req_send (bp , req );
286302 if (rc ) {
287- mutex_unlock ( & bp -> hwrm_cmd_lock );
303+ hwrm_req_drop ( bp , req );
288304 return rc ;
289305 }
290306
291307 pri_mask = le32_to_cpu (resp -> flags );
292308 pfc -> pfc_en = pri_mask ;
293- mutex_unlock ( & bp -> hwrm_cmd_lock );
309+ hwrm_req_drop ( bp , req );
294310 return 0 ;
295311}
296312
297313static int bnxt_hwrm_set_dcbx_app (struct bnxt * bp , struct dcb_app * app ,
298314 bool add )
299315{
300- struct hwrm_fw_set_structured_data_input set = { 0 } ;
301- struct hwrm_fw_get_structured_data_input get = { 0 } ;
316+ struct hwrm_fw_set_structured_data_input * set ;
317+ struct hwrm_fw_get_structured_data_input * get ;
302318 struct hwrm_struct_data_dcbx_app * fw_app ;
303319 struct hwrm_struct_hdr * data ;
304320 dma_addr_t mapping ;
@@ -308,19 +324,26 @@ static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
308324 if (bp -> hwrm_spec_code < 0x10601 )
309325 return 0 ;
310326
327+ rc = hwrm_req_init (bp , get , HWRM_FW_GET_STRUCTURED_DATA );
328+ if (rc )
329+ return rc ;
330+
331+ hwrm_req_hold (bp , get );
332+ hwrm_req_alloc_flags (bp , get , GFP_KERNEL | __GFP_ZERO );
333+
311334 n = IEEE_8021QAZ_MAX_TCS ;
312335 data_len = sizeof (* data ) + sizeof (* fw_app ) * n ;
313- data = dma_alloc_coherent (& bp -> pdev -> dev , data_len , & mapping ,
314- GFP_KERNEL );
315- if (!data )
316- return - ENOMEM ;
336+ data = hwrm_req_dma_slice (bp , get , data_len , & mapping );
337+ if (!data ) {
338+ rc = - ENOMEM ;
339+ goto set_app_exit ;
340+ }
317341
318- bnxt_hwrm_cmd_hdr_init (bp , & get , HWRM_FW_GET_STRUCTURED_DATA , -1 , -1 );
319- get .dest_data_addr = cpu_to_le64 (mapping );
320- get .structure_id = cpu_to_le16 (STRUCT_HDR_STRUCT_ID_DCBX_APP );
321- get .subtype = cpu_to_le16 (HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL );
322- get .count = 0 ;
323- rc = hwrm_send_message (bp , & get , sizeof (get ), HWRM_CMD_TIMEOUT );
342+ get -> dest_data_addr = cpu_to_le64 (mapping );
343+ get -> structure_id = cpu_to_le16 (STRUCT_HDR_STRUCT_ID_DCBX_APP );
344+ get -> subtype = cpu_to_le16 (HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL );
345+ get -> count = 0 ;
346+ rc = hwrm_req_send (bp , get );
324347 if (rc )
325348 goto set_app_exit ;
326349
@@ -366,68 +389,75 @@ static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
366389 data -> len = cpu_to_le16 (sizeof (* fw_app ) * n );
367390 data -> subtype = cpu_to_le16 (HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL );
368391
369- bnxt_hwrm_cmd_hdr_init (bp , & set , HWRM_FW_SET_STRUCTURED_DATA , -1 , -1 );
370- set .src_data_addr = cpu_to_le64 (mapping );
371- set .data_len = cpu_to_le16 (sizeof (* data ) + sizeof (* fw_app ) * n );
372- set .hdr_cnt = 1 ;
373- rc = hwrm_send_message (bp , & set , sizeof (set ), HWRM_CMD_TIMEOUT );
392+ rc = hwrm_req_init (bp , set , HWRM_FW_SET_STRUCTURED_DATA );
393+ if (rc )
394+ goto set_app_exit ;
395+
396+ set -> src_data_addr = cpu_to_le64 (mapping );
397+ set -> data_len = cpu_to_le16 (sizeof (* data ) + sizeof (* fw_app ) * n );
398+ set -> hdr_cnt = 1 ;
399+ rc = hwrm_req_send (bp , set );
374400
375401set_app_exit :
376- dma_free_coherent ( & bp -> pdev -> dev , data_len , data , mapping );
402+ hwrm_req_drop ( bp , get ); /* dropping get request and associated slice */
377403 return rc ;
378404}
379405
380406static int bnxt_hwrm_queue_dscp_qcaps (struct bnxt * bp )
381407{
382- struct hwrm_queue_dscp_qcaps_output * resp = bp -> hwrm_cmd_resp_addr ;
383- struct hwrm_queue_dscp_qcaps_input req = { 0 } ;
408+ struct hwrm_queue_dscp_qcaps_output * resp ;
409+ struct hwrm_queue_dscp_qcaps_input * req ;
384410 int rc ;
385411
386412 bp -> max_dscp_value = 0 ;
387413 if (bp -> hwrm_spec_code < 0x10800 || BNXT_VF (bp ))
388414 return 0 ;
389415
390- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_DSCP_QCAPS , -1 , -1 );
391- mutex_lock (& bp -> hwrm_cmd_lock );
392- rc = _hwrm_send_message_silent (bp , & req , sizeof (req ), HWRM_CMD_TIMEOUT );
416+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_DSCP_QCAPS );
417+ if (rc )
418+ return rc ;
419+
420+ resp = hwrm_req_hold (bp , req );
421+ rc = hwrm_req_send_silent (bp , req );
393422 if (!rc ) {
394423 bp -> max_dscp_value = (1 << resp -> num_dscp_bits ) - 1 ;
395424 if (bp -> max_dscp_value < 0x3f )
396425 bp -> max_dscp_value = 0 ;
397426 }
398-
399- mutex_unlock (& bp -> hwrm_cmd_lock );
427+ hwrm_req_drop (bp , req );
400428 return rc ;
401429}
402430
403431static int bnxt_hwrm_queue_dscp2pri_cfg (struct bnxt * bp , struct dcb_app * app ,
404432 bool add )
405433{
406- struct hwrm_queue_dscp2pri_cfg_input req = { 0 } ;
434+ struct hwrm_queue_dscp2pri_cfg_input * req ;
407435 struct bnxt_dscp2pri_entry * dscp2pri ;
408436 dma_addr_t mapping ;
409437 int rc ;
410438
411439 if (bp -> hwrm_spec_code < 0x10800 )
412440 return 0 ;
413441
414- bnxt_hwrm_cmd_hdr_init (bp , & req , HWRM_QUEUE_DSCP2PRI_CFG , -1 , -1 );
415- dscp2pri = dma_alloc_coherent (& bp -> pdev -> dev , sizeof (* dscp2pri ),
416- & mapping , GFP_KERNEL );
417- if (!dscp2pri )
442+ rc = hwrm_req_init (bp , req , HWRM_QUEUE_DSCP2PRI_CFG );
443+ if (rc )
444+ return rc ;
445+
446+ dscp2pri = hwrm_req_dma_slice (bp , req , sizeof (* dscp2pri ), & mapping );
447+ if (!dscp2pri ) {
448+ hwrm_req_drop (bp , req );
418449 return - ENOMEM ;
450+ }
419451
420- req . src_data_addr = cpu_to_le64 (mapping );
452+ req -> src_data_addr = cpu_to_le64 (mapping );
421453 dscp2pri -> dscp = app -> protocol ;
422454 if (add )
423455 dscp2pri -> mask = 0x3f ;
424456 else
425457 dscp2pri -> mask = 0 ;
426458 dscp2pri -> pri = app -> priority ;
427- req .entry_cnt = cpu_to_le16 (1 );
428- rc = hwrm_send_message (bp , & req , sizeof (req ), HWRM_CMD_TIMEOUT );
429- dma_free_coherent (& bp -> pdev -> dev , sizeof (* dscp2pri ), dscp2pri ,
430- mapping );
459+ req -> entry_cnt = cpu_to_le16 (1 );
460+ rc = hwrm_req_send (bp , req );
431461 return rc ;
432462}
433463
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