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Documentation: dpll: wrap DPLL_CMD_PIN_GET output in a code block
DPLL_CMD_PIN_GET netlink command output for mux-type pins looks ugly with normal paragraph formatting. Format it as a code block instead. Signed-off-by: Bagas Sanjaya <bagasdotme@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> Reviewed-by: Vadim Fedorenko <vadim.fedorenko@linux.dev> Link: https://lore.kernel.org/r/20230928052708.44820-3-bagasdotme@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Documentation/driver-api/dpll.rst

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@@ -119,19 +119,19 @@ with.
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If a pin was registered with multiple parent pins, they behave like a
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multiple output multiplexer. In this case output of a
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``DPLL_CMD_PIN_GET`` would contain multiple pin-parent nested
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attributes with current state related to each parent, like:
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'pin': [{{
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'clock-id': 282574471561216,
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'module-name': 'ice',
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'capabilities': 4,
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'id': 13,
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'parent-pin': [
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{'parent-id': 2, 'state': 'connected'},
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{'parent-id': 3, 'state': 'disconnected'}
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],
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'type': 'synce-eth-port'
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}}]
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attributes with current state related to each parent, like::
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'pin': [{{
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'clock-id': 282574471561216,
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'module-name': 'ice',
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'capabilities': 4,
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'id': 13,
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'parent-pin': [
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{'parent-id': 2, 'state': 'connected'},
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{'parent-id': 3, 'state': 'disconnected'}
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],
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'type': 'synce-eth-port'
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}}]
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Only one child pin can provide its signal to the parent MUX-type pin at
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a time, the selection is done by requesting change of a child pin state

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