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EDAC: Add support for EDAC device features control
Add generic EDAC device feature controls supporting the registration of RAS features available in the system. The driver exposes control attributes for these features to userspace in /sys/bus/edac/devices/<dev-name>/<ras-feature> [ bp: Touch-up documentation, simplify, make edac_dev_type static, fixup edac_dev_register() retvals. ] Co-developed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Fan Ni <fan.ni@samsung.com> Tested-by: Daniel Ferguson <danielf@os.amperecomputing.com> Tested-by: Fan Ni <fan.ni@samsung.com> Link: https://lore.kernel.org/r/20250212143654.1893-2-shiju.jose@huawei.com
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‎Documentation/edac/features.rst‎

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.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later
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=================
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EDAC/RAS features
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=================
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Copyright (c) 2024-2025 HiSilicon Limited.
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:Author: Shiju Jose <shiju.jose@huawei.com>
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:License: The GNU Free Documentation License, Version 1.2 without
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Invariant Sections, Front-Cover Texts nor Back-Cover Texts.
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(dual licensed under the GPL v2)
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- Written for: 6.15
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Introduction
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------------
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EDAC/RAS components plugging and high-level design:
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1. Scrub control
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2. Error Check Scrub (ECS) control
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3. ACPI RAS2 features
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4. Post Package Repair (PPR) control
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5. Memory Sparing Repair control
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High level design is illustrated in the following diagram::
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+-----------------------------------------------+
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| Userspace - Rasdaemon |
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| +-------------+ |
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| | RAS CXL mem | +---------------+ |
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| |error handler|---->| | |
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| +-------------+ | RAS dynamic | |
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| +-------------+ | scrub, memory | |
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| | RAS memory |---->| repair control| |
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| |error handler| +----|----------+ |
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| +-------------+ | |
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+--------------------------|--------------------+
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|
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|
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+-------------------------------|------------------------------+
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| Kernel EDAC extension for | controlling RAS Features |
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|+------------------------------|----------------------------+ |
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|| EDAC Core Sysfs EDAC| Bus | |
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|| +--------------------------|---------------------------+| |
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|| |/sys/bus/edac/devices/<dev>/scrubX/ | | EDAC device || |
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|| |/sys/bus/edac/devices/<dev>/ecsX/ |<->| EDAC MC || |
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|| |/sys/bus/edac/devices/<dev>/repairX | | EDAC sysfs || |
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|| +---------------------------|--------------------------+| |
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|| EDAC|Bus | |
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|| | | |
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|| +----------+ Get feature | Get feature | |
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|| | | desc +---------|------+ desc +----------+ | |
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|| |EDAC scrub|<-----| EDAC device | | | | |
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|| +----------+ | driver- RAS |----->| EDAC mem | | |
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|| +----------+ | feature control| | repair | | |
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|| | |<-----| | +----------+ | |
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|| |EDAC ECS | +---------|------+ | |
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|| +----------+ Register RAS|features | |
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|| ______________________|_____________ | |
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|+---------|---------------|------------------|--------------+ |
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| +-------|----+ +-------|-------+ +----|----------+ |
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| | | | CXL mem driver| | Client driver | |
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| | ACPI RAS2 | | scrub, ECS, | | memory repair | |
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| | driver | | sparing, PPR | | features | |
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| +-----|------+ +-------|-------+ +------|--------+ |
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| | | | |
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+--------|-----------------|--------------------|--------------+
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| | |
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+--------|-----------------|--------------------|--------------+
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| +---|-----------------|--------------------|-------+ |
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| | | |
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| | Platform HW and Firmware | |
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| +--------------------------------------------------+ |
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+--------------------------------------------------------------+
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1. EDAC Features components - Create feature-specific descriptors. For
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example: scrub, ECS, memory repair in the above diagram.
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2. EDAC device driver for controlling RAS Features - Get feature's attribute
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descriptors from EDAC RAS feature component and registers device's RAS
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features with EDAC bus and expose the features control attributes via
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sysfs. For example, /sys/bus/edac/devices/<dev-name>/<feature>X/
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3. RAS dynamic feature controller - Userspace sample modules in rasdaemon for
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dynamic scrub/repair control to issue scrubbing/repair when excess number
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of corrected memory errors are reported in a short span of time.

‎Documentation/edac/index.rst‎

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.. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later
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==============
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EDAC Subsystem
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==============
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.. toctree::
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:maxdepth: 1
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features

‎drivers/edac/edac_device.c‎

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@@ -570,3 +570,104 @@ void edac_device_handle_ue_count(struct edac_device_ctl_info *edac_dev,
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block ? block->name : "N/A", count, msg);
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}
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EXPORT_SYMBOL_GPL(edac_device_handle_ue_count);
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static void edac_dev_release(struct device *dev)
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{
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struct edac_dev_feat_ctx *ctx = container_of(dev, struct edac_dev_feat_ctx, dev);
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kfree(ctx->dev.groups);
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kfree(ctx);
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}
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static const struct device_type edac_dev_type = {
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.name = "edac_dev",
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.release = edac_dev_release,
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};
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static void edac_dev_unreg(void *data)
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{
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device_unregister(data);
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}
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/**
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* edac_dev_register - register device for RAS features with EDAC
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* @parent: parent device.
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* @name: name for the folder in the /sys/bus/edac/devices/,
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* which is derived from the parent device.
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* For e.g. /sys/bus/edac/devices/cxl_mem0/
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* @private: parent driver's data to store in the context if any.
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* @num_features: number of RAS features to register.
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* @ras_features: list of RAS features to register.
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*
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* Return:
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* * %0 - Success.
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* * %-EINVAL - Invalid parameters passed.
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* * %-ENOMEM - Dynamic memory allocation failed.
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*
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*/
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int edac_dev_register(struct device *parent, char *name,
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void *private, int num_features,
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const struct edac_dev_feature *ras_features)
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{
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const struct attribute_group **ras_attr_groups;
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struct edac_dev_feat_ctx *ctx;
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int attr_gcnt = 0;
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int ret = -ENOMEM;
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int feat;
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if (!parent || !name || !num_features || !ras_features)
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return -EINVAL;
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/* Double parse to make space for attributes */
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for (feat = 0; feat < num_features; feat++) {
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switch (ras_features[feat].ft_type) {
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/* Add feature specific code */
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default:
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return -EINVAL;
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}
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}
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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ras_attr_groups = kcalloc(attr_gcnt + 1, sizeof(*ras_attr_groups), GFP_KERNEL);
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if (!ras_attr_groups)
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goto ctx_free;
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attr_gcnt = 0;
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for (feat = 0; feat < num_features; feat++, ras_features++) {
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switch (ras_features->ft_type) {
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/* Add feature specific code */
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default:
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ret = -EINVAL;
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goto groups_free;
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}
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}
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ctx->dev.parent = parent;
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ctx->dev.bus = edac_get_sysfs_subsys();
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ctx->dev.type = &edac_dev_type;
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ctx->dev.groups = ras_attr_groups;
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ctx->private = private;
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dev_set_drvdata(&ctx->dev, ctx);
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ret = dev_set_name(&ctx->dev, name);
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if (ret)
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goto groups_free;
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ret = device_register(&ctx->dev);
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if (ret) {
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put_device(&ctx->dev);
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return ret;
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}
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return devm_add_action_or_reset(parent, edac_dev_unreg, &ctx->dev);
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groups_free:
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kfree(ras_attr_groups);
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ctx_free:
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kfree(ctx);
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return ret;
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}
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EXPORT_SYMBOL_GPL(edac_dev_register);

‎include/linux/edac.h‎

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@@ -661,4 +661,30 @@ static inline struct dimm_info *edac_get_dimm(struct mem_ctl_info *mci,
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return mci->dimms[index];
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}
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/* RAS feature type */
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enum edac_dev_feat {
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RAS_FEAT_MAX
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};
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/* EDAC device feature information structure */
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struct edac_dev_data {
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u8 instance;
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void *private;
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};
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struct edac_dev_feat_ctx {
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struct device dev;
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void *private;
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};
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struct edac_dev_feature {
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enum edac_dev_feat ft_type;
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u8 instance;
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void *ctx;
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};
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int edac_dev_register(struct device *parent, char *dev_name,
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void *parent_pvt_data, int num_features,
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const struct edac_dev_feature *ras_features);
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#endif /* _LINUX_EDAC_H_ */

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