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LuBaolujoergroedel
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iommu/vt-d: Remove WO permissions on second-level paging entries
When the first level page table is used for IOVA translation, it only supports Read-Only and Read-Write permissions. The Write-Only permission is not supported as the PRESENT bit (implying Read permission) should always set. When using second level, we still give separate permissions that allows WriteOnly which seems inconsistent and awkward. We want to have consistent behavior. After moving to 1st level, we don't want things to work sometimes, and break if we use 2nd level for the same mappings. Hence remove this configuration. Suggested-by: Ashok Raj <ashok.raj@intel.com> Fixes: b802d07 ("iommu/vt-d: Use iova over first level") Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Link: https://lore.kernel.org/r/20210320025415.641201-3-baolu.lu@linux.intel.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
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drivers/iommu/intel/iommu.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2312,8 +2312,9 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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return -EINVAL;
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attr = prot & (DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP);
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attr |= DMA_FL_PTE_PRESENT;
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if (domain_use_first_level(domain)) {
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attr |= DMA_FL_PTE_PRESENT | DMA_FL_PTE_XD | DMA_FL_PTE_US;
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attr |= DMA_FL_PTE_XD | DMA_FL_PTE_US;
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if (domain->domain.type == IOMMU_DOMAIN_DMA) {
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attr |= DMA_FL_PTE_ACCESS;

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