Skip to content

Commit fd23023

Browse files
shravankumarrij-intel
shravankumarr
authored and
ij-intel
committed
platform/mellanox: mlxbf-pmc: Replace uintN_t with kernel-style types
Use u8, u32 and u64 instead of respective uintN_t types. Remove unnecessary newlines for function argument lists. Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com> Link: https://lore.kernel.org/r/39be055af3506ce6f843d11e45d71620f2a96e26.1707808180.git.shravankr@nvidia.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
1 parent 5b559e8 commit fd23023

File tree

1 file changed

+47
-62
lines changed

1 file changed

+47
-62
lines changed

‎drivers/platform/mellanox/mlxbf-pmc.c‎

Lines changed: 47 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -149,17 +149,17 @@ struct mlxbf_pmc_block_info {
149149
*/
150150
struct mlxbf_pmc_context {
151151
struct platform_device *pdev;
152-
uint32_t total_blocks;
153-
uint32_t tile_count;
154-
uint8_t llt_enable;
155-
uint8_t mss_enable;
156-
uint32_t group_num;
152+
u32 total_blocks;
153+
u32 tile_count;
154+
u8 llt_enable;
155+
u8 mss_enable;
156+
u32 group_num;
157157
struct device *hwmon_dev;
158158
const char *block_name[MLXBF_PMC_MAX_BLOCKS];
159159
struct mlxbf_pmc_block_info block[MLXBF_PMC_MAX_BLOCKS];
160160
const struct attribute_group *groups[MLXBF_PMC_MAX_BLOCKS];
161161
bool svc_sreg_support;
162-
uint32_t sreg_tbl_perf;
162+
u32 sreg_tbl_perf;
163163
unsigned int event_set;
164164
};
165165

@@ -865,8 +865,7 @@ static struct mlxbf_pmc_context *pmc;
865865
static const char *mlxbf_pmc_svc_uuid_str = "89c036b4-e7d7-11e6-8797-001aca00bfc4";
866866

867867
/* Calls an SMC to access a performance register */
868-
static int mlxbf_pmc_secure_read(void __iomem *addr, uint32_t command,
869-
uint64_t *result)
868+
static int mlxbf_pmc_secure_read(void __iomem *addr, u32 command, u64 *result)
870869
{
871870
struct arm_smccc_res res;
872871
int status, err = 0;
@@ -892,8 +891,7 @@ static int mlxbf_pmc_secure_read(void __iomem *addr, uint32_t command,
892891
}
893892

894893
/* Read from a performance counter */
895-
static int mlxbf_pmc_read(void __iomem *addr, uint32_t command,
896-
uint64_t *result)
894+
static int mlxbf_pmc_read(void __iomem *addr, u32 command, u64 *result)
897895
{
898896
if (pmc->svc_sreg_support)
899897
return mlxbf_pmc_secure_read(addr, command, result);
@@ -907,22 +905,21 @@ static int mlxbf_pmc_read(void __iomem *addr, uint32_t command,
907905
}
908906

909907
/* Convenience function for 32-bit reads */
910-
static int mlxbf_pmc_readl(void __iomem *addr, uint32_t *result)
908+
static int mlxbf_pmc_readl(void __iomem *addr, u32 *result)
911909
{
912-
uint64_t read_out;
910+
u64 read_out;
913911
int status;
914912

915913
status = mlxbf_pmc_read(addr, MLXBF_PMC_READ_REG_32, &read_out);
916914
if (status)
917915
return status;
918-
*result = (uint32_t)read_out;
916+
*result = (u32)read_out;
919917

920918
return 0;
921919
}
922920

923921
/* Calls an SMC to access a performance register */
924-
static int mlxbf_pmc_secure_write(void __iomem *addr, uint32_t command,
925-
uint64_t value)
922+
static int mlxbf_pmc_secure_write(void __iomem *addr, u32 command, u64 value)
926923
{
927924
struct arm_smccc_res res;
928925
int status, err = 0;
@@ -945,7 +942,7 @@ static int mlxbf_pmc_secure_write(void __iomem *addr, uint32_t command,
945942
}
946943

947944
/* Write to a performance counter */
948-
static int mlxbf_pmc_write(void __iomem *addr, int command, uint64_t value)
945+
static int mlxbf_pmc_write(void __iomem *addr, int command, u64 value)
949946
{
950947
if (pmc->svc_sreg_support)
951948
return mlxbf_pmc_secure_write(addr, command, value);
@@ -959,7 +956,7 @@ static int mlxbf_pmc_write(void __iomem *addr, int command, uint64_t value)
959956
}
960957

961958
/* Check if the register offset is within the mapped region for the block */
962-
static bool mlxbf_pmc_valid_range(int blk_num, uint32_t offset)
959+
static bool mlxbf_pmc_valid_range(int blk_num, u32 offset)
963960
{
964961
if ((offset >= 0) && !(offset % MLXBF_PMC_REG_SIZE) &&
965962
(offset + MLXBF_PMC_REG_SIZE <= pmc->block[blk_num].blk_size))
@@ -1082,7 +1079,7 @@ static char *mlxbf_pmc_get_event_name(const char *blk, int evt)
10821079
/* Method to enable/disable/reset l3cache counters */
10831080
static int mlxbf_pmc_config_l3_counters(int blk_num, bool enable, bool reset)
10841081
{
1085-
uint32_t perfcnt_cfg = 0;
1082+
u32 perfcnt_cfg = 0;
10861083

10871084
if (enable)
10881085
perfcnt_cfg |= MLXBF_PMC_L3C_PERF_CNT_CFG_EN;
@@ -1095,12 +1092,9 @@ static int mlxbf_pmc_config_l3_counters(int blk_num, bool enable, bool reset)
10951092
}
10961093

10971094
/* Method to handle l3cache counter programming */
1098-
static int mlxbf_pmc_program_l3_counter(int blk_num, uint32_t cnt_num,
1099-
uint32_t evt)
1095+
static int mlxbf_pmc_program_l3_counter(int blk_num, u32 cnt_num, u32 evt)
11001096
{
1101-
uint32_t perfcnt_sel_1 = 0;
1102-
uint32_t perfcnt_sel = 0;
1103-
uint32_t *wordaddr;
1097+
u32 perfcnt_sel_1 = 0, perfcnt_sel = 0, *wordaddr;
11041098
void __iomem *pmcaddr;
11051099
int ret;
11061100

@@ -1162,11 +1156,10 @@ static int mlxbf_pmc_program_l3_counter(int blk_num, uint32_t cnt_num,
11621156
}
11631157

11641158
/* Method to handle crspace counter programming */
1165-
static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num,
1166-
uint32_t evt)
1159+
static int mlxbf_pmc_program_crspace_counter(int blk_num, u32 cnt_num, u32 evt)
11671160
{
1168-
uint32_t word;
11691161
void *addr;
1162+
u32 word;
11701163
int ret;
11711164

11721165
addr = pmc->block[blk_num].mmio_base +
@@ -1187,7 +1180,7 @@ static int mlxbf_pmc_program_crspace_counter(int blk_num, uint32_t cnt_num,
11871180
}
11881181

11891182
/* Method to clear crspace counter value */
1190-
static int mlxbf_pmc_clear_crspace_counter(int blk_num, uint32_t cnt_num)
1183+
static int mlxbf_pmc_clear_crspace_counter(int blk_num, u32 cnt_num)
11911184
{
11921185
void *addr;
11931186

@@ -1199,10 +1192,9 @@ static int mlxbf_pmc_clear_crspace_counter(int blk_num, uint32_t cnt_num)
11991192
}
12001193

12011194
/* Method to program a counter to monitor an event */
1202-
static int mlxbf_pmc_program_counter(int blk_num, uint32_t cnt_num,
1203-
uint32_t evt, bool is_l3)
1195+
static int mlxbf_pmc_program_counter(int blk_num, u32 cnt_num, u32 evt, bool is_l3)
12041196
{
1205-
uint64_t perfctl, perfevt, perfmon_cfg;
1197+
u64 perfctl, perfevt, perfmon_cfg;
12061198

12071199
if (cnt_num >= pmc->block[blk_num].counters)
12081200
return -ENODEV;
@@ -1263,12 +1255,11 @@ static int mlxbf_pmc_program_counter(int blk_num, uint32_t cnt_num,
12631255
}
12641256

12651257
/* Method to handle l3 counter reads */
1266-
static int mlxbf_pmc_read_l3_counter(int blk_num, uint32_t cnt_num,
1267-
uint64_t *result)
1258+
static int mlxbf_pmc_read_l3_counter(int blk_num, u32 cnt_num, u64 *result)
12681259
{
1269-
uint32_t perfcnt_low = 0, perfcnt_high = 0;
1270-
uint64_t value;
1260+
u32 perfcnt_low = 0, perfcnt_high = 0;
12711261
int status;
1262+
u64 value;
12721263

12731264
status = mlxbf_pmc_readl(pmc->block[blk_num].mmio_base +
12741265
MLXBF_PMC_L3C_PERF_CNT_LOW +
@@ -1295,11 +1286,10 @@ static int mlxbf_pmc_read_l3_counter(int blk_num, uint32_t cnt_num,
12951286
}
12961287

12971288
/* Method to handle crspace counter reads */
1298-
static int mlxbf_pmc_read_crspace_counter(int blk_num, uint32_t cnt_num,
1299-
uint64_t *result)
1289+
static int mlxbf_pmc_read_crspace_counter(int blk_num, u32 cnt_num, u64 *result)
13001290
{
1301-
uint32_t value;
13021291
int status = 0;
1292+
u32 value;
13031293

13041294
status = mlxbf_pmc_readl(pmc->block[blk_num].mmio_base +
13051295
MLXBF_PMC_CRSPACE_PERFMON_VAL0(pmc->block[blk_num].counters) +
@@ -1313,11 +1303,10 @@ static int mlxbf_pmc_read_crspace_counter(int blk_num, uint32_t cnt_num,
13131303
}
13141304

13151305
/* Method to read the counter value */
1316-
static int mlxbf_pmc_read_counter(int blk_num, uint32_t cnt_num, bool is_l3,
1317-
uint64_t *result)
1306+
static int mlxbf_pmc_read_counter(int blk_num, u32 cnt_num, bool is_l3, u64 *result)
13181307
{
1319-
uint32_t perfcfg_offset, perfval_offset;
1320-
uint64_t perfmon_cfg;
1308+
u32 perfcfg_offset, perfval_offset;
1309+
u64 perfmon_cfg;
13211310
int status;
13221311

13231312
if (cnt_num >= pmc->block[blk_num].counters)
@@ -1351,13 +1340,11 @@ static int mlxbf_pmc_read_counter(int blk_num, uint32_t cnt_num, bool is_l3,
13511340
}
13521341

13531342
/* Method to read L3 block event */
1354-
static int mlxbf_pmc_read_l3_event(int blk_num, uint32_t cnt_num,
1355-
uint64_t *result)
1343+
static int mlxbf_pmc_read_l3_event(int blk_num, u32 cnt_num, u64 *result)
13561344
{
1357-
uint32_t perfcnt_sel = 0, perfcnt_sel_1 = 0;
1358-
uint32_t *wordaddr;
1345+
u32 perfcnt_sel = 0, perfcnt_sel_1 = 0, *wordaddr;
13591346
void __iomem *pmcaddr;
1360-
uint64_t evt;
1347+
u64 evt;
13611348

13621349
/* Select appropriate register information */
13631350
switch (cnt_num) {
@@ -1405,10 +1392,9 @@ static int mlxbf_pmc_read_l3_event(int blk_num, uint32_t cnt_num,
14051392
}
14061393

14071394
/* Method to read crspace block event */
1408-
static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num,
1409-
uint64_t *result)
1395+
static int mlxbf_pmc_read_crspace_event(int blk_num, u32 cnt_num, u64 *result)
14101396
{
1411-
uint32_t word, evt;
1397+
u32 word, evt;
14121398
void *addr;
14131399
int ret;
14141400

@@ -1429,11 +1415,10 @@ static int mlxbf_pmc_read_crspace_event(int blk_num, uint32_t cnt_num,
14291415
}
14301416

14311417
/* Method to find the event currently being monitored by a counter */
1432-
static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3,
1433-
uint64_t *result)
1418+
static int mlxbf_pmc_read_event(int blk_num, u32 cnt_num, bool is_l3, u64 *result)
14341419
{
1435-
uint32_t perfcfg_offset, perfval_offset;
1436-
uint64_t perfmon_cfg, perfevt;
1420+
u32 perfcfg_offset, perfval_offset;
1421+
u64 perfmon_cfg, perfevt;
14371422

14381423
if (cnt_num >= pmc->block[blk_num].counters)
14391424
return -EINVAL;
@@ -1469,9 +1454,9 @@ static int mlxbf_pmc_read_event(int blk_num, uint32_t cnt_num, bool is_l3,
14691454
}
14701455

14711456
/* Method to read a register */
1472-
static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result)
1457+
static int mlxbf_pmc_read_reg(int blk_num, u32 offset, u64 *result)
14731458
{
1474-
uint32_t ecc_out;
1459+
u32 ecc_out;
14751460

14761461
if (strstr(pmc->block_name[blk_num], "ecc")) {
14771462
if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset,
@@ -1490,7 +1475,7 @@ static int mlxbf_pmc_read_reg(int blk_num, uint32_t offset, uint64_t *result)
14901475
}
14911476

14921477
/* Method to write to a register */
1493-
static int mlxbf_pmc_write_reg(int blk_num, uint32_t offset, uint64_t data)
1478+
static int mlxbf_pmc_write_reg(int blk_num, u32 offset, u64 data)
14941479
{
14951480
if (strstr(pmc->block_name[blk_num], "ecc")) {
14961481
return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset,
@@ -1512,7 +1497,7 @@ static ssize_t mlxbf_pmc_counter_show(struct device *dev,
15121497
attr, struct mlxbf_pmc_attribute, dev_attr);
15131498
int blk_num, cnt_num, offset;
15141499
bool is_l3 = false;
1515-
uint64_t value;
1500+
u64 value;
15161501

15171502
blk_num = attr_counter->nr;
15181503
cnt_num = attr_counter->index;
@@ -1546,7 +1531,7 @@ static ssize_t mlxbf_pmc_counter_store(struct device *dev,
15461531
attr, struct mlxbf_pmc_attribute, dev_attr);
15471532
int blk_num, cnt_num, offset, err, data;
15481533
bool is_l3 = false;
1549-
uint64_t evt_num;
1534+
u64 evt_num;
15501535

15511536
blk_num = attr_counter->nr;
15521537
cnt_num = attr_counter->index;
@@ -1597,7 +1582,7 @@ static ssize_t mlxbf_pmc_event_show(struct device *dev,
15971582
attr, struct mlxbf_pmc_attribute, dev_attr);
15981583
int blk_num, cnt_num, err;
15991584
bool is_l3 = false;
1600-
uint64_t evt_num;
1585+
u64 evt_num;
16011586
char *evt_name;
16021587

16031588
blk_num = attr_event->nr;
@@ -1686,7 +1671,7 @@ static ssize_t mlxbf_pmc_enable_show(struct device *dev,
16861671
{
16871672
struct mlxbf_pmc_attribute *attr_enable = container_of(
16881673
attr, struct mlxbf_pmc_attribute, dev_attr);
1689-
uint32_t perfcnt_cfg, word;
1674+
u32 perfcnt_cfg, word;
16901675
int blk_num, value;
16911676

16921677
blk_num = attr_enable->nr;
@@ -1718,7 +1703,7 @@ static ssize_t mlxbf_pmc_enable_store(struct device *dev,
17181703
struct mlxbf_pmc_attribute *attr_enable = container_of(
17191704
attr, struct mlxbf_pmc_attribute, dev_attr);
17201705
int err, en, blk_num;
1721-
uint32_t word;
1706+
u32 word;
17221707

17231708
blk_num = attr_enable->nr;
17241709

@@ -1914,7 +1899,7 @@ static bool mlxbf_pmc_guid_match(const guid_t *guid,
19141899
/* Helper to map the Performance Counters from the varios blocks */
19151900
static int mlxbf_pmc_map_counters(struct device *dev)
19161901
{
1917-
uint64_t info[MLXBF_PMC_INFO_SZ];
1902+
u64 info[MLXBF_PMC_INFO_SZ];
19181903
int i, tile_num, ret;
19191904

19201905
for (i = 0; i < pmc->total_blocks; ++i) {

0 commit comments

Comments
 (0)