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2. Hardware
| Component | Detail |
|---|---|
| SoC | STM32MP135DAF7, Cortex-A7 single-core, up to 1 GHz |
| RAM | 256 MB DDR3L (16-bit, 533 MHz) at 0xc0000000
|
| Flash | 256 MB SPI-NAND (Micron MT29F2G01ABAGDWB) via QSPI |
| Console | UART4, 115200 8N1 |
| USB OTG | DWC2 / usbotg_hs, USB-C, fixed peripheral (gadget) role |
| USB host | EHCI / usbh_ehci, standard-A port |
Ethernet, audio, display, and camera are not enabled.
The USB OTG port is configured with dr_mode = "peripheral", so it operates only as a USB gadget. USB-C dual-role and power-role switching are not supported. The OTG TX FIFOs are resized (g-tx-fifo-size) to fit a 1024-byte HID endpoint alongside ECM or other gadget functions. Gadget configs with more or larger IN endpoints may need these adjusted.
Note: U-Boot sets u-boot,force-b-session-valid on usbotg_hs, bypassing VBUS (PI7) and ID (PA10) sensing so DFU (stm32prog) works on carrier boards that use those pins for other IO. This mirrors usage on the official STM32MP135F-DK.
| Component | Version |
|---|---|
| Buildroot | 2025.02.18 LTS |
| Linux | 6.12.112 (6.12 LTS) |
| TF-A | lts-v2.14.10 |
| OP-TEE | 4.3.0 |
| U-Boot | 2026.07 |
| Toolchain | Buildroot internal glibc, NEON/VFPv4 |
| Region | Start | Size | Description |
|---|---|---|---|
| Linux RAM | 0xc0000000 |
208 MB | Normal-world usable memory |
| OP-TEE shmem | 0xcd000000 |
16 MB reserved, 2 MB used | Shared buffer between Linux and OP-TEE (CFG_SHMEM_SIZE=0x200000) |
| OP-TEE secure | 0xce000000 |
32 MB | Secure OS, no-map (CFG_TZDRAM_START) |
| Partition | Offset | Size | Contents |
|---|---|---|---|
fsbl1 |
0x000000 |
512 KB | TF-A BL2 copy 1 |
fsbl2 |
0x080000 |
512 KB | TF-A BL2 copy 2 |
fip-active |
0x100000 |
4 MB | Active FIP, loaded first by BL2 and managed by RAUC |
fip-factory |
0x500000 |
4 MB | Factory FIP fallback, reached when BL2 walks past a bad fip-active
|
UBI |
0x900000 |
~247 MB | UBI volumes: redundant U-Boot environment, A/B and factory root filesystems, data overlay, and OP-TEE secure storage |
The two FIP partitions and the BL2 fallback walk are described in Boot Chain.
The runtime console uses UART4 TTL at 115200 8N1.
To connect:
- Connect a USB-to-TTL adapter to the board UART4 header (GND, RX, TX).
- Set the BOOT pins to SPI-NAND mode and reset or power-cycle the board (see Flashing for pin settings).
- Open the console with minicom:
minicom -D /dev/ttyUSB0 -b 115200 -8The TF-A, U-Boot, and Linux boot logs should appear on this port.