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"NiNA Integrates the N1 Architecture"
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NiNA ==== NiNA is a small computer system integrating two N1 CPUs. Directories: ============ | +-components | | | +-iCE40_Primitives - Behavioral models for iCE40 primitives | | | +-N1 - N1 processor | | | +-NiNA_Core - Core layer (digital logic and RAMs) | | | +-NiNA_PMem - Program memory | | | +-NiNA_Regs - Register block | | | +-NiNA_SMem - Stack memory | | | +-WbXbc - Wishbone crossbar components | | | +-... - TBD | +-doc - User manual | +-src - LaTex source files | +-run - Build directory The NiNA soft IP is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with the NiNA soft IP. If not, see <http://www.gnu.org/licenses/>.
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