FlexCAN peripheral addition #122

dstric-aqueduct · 2022-12-12T15:35:15Z

This pull request adds functionality for the imxrt's FlexCAN1 and FlexCAN2 peripherals.

See corresponding update to teensy4-rs crate: mciantyre/teensy4-rs#124

Credit to Antonio Brewer (tonton81) for much of the API inspiration from the FlexCAN_T4 library: https://github.com/tonton81/FlexCAN_T4

mciantyre

Thanks for putting this together. My first pass is a brief code study. I'm not too familiar with this peripheral, but I'll try to get some time to study the FlexCAN chapter in the reference manual.

I notice that we're re-naming the package and files. I'm guessing that's to support Teensy 4 prototyping. If that's the case, would you mind rebasing this branch onto the maint-v0.4 branch, then re-targeting the PR to maint-v0.4 (edit the PR, and change the base branch)? Once this happens, we won't have to re-name all these files, and it will simplify integration and release into the 0.4 HAL.

My review include considerations for #121. Once we're in a good state, I can port this driver into the next HAL.

imxrt-hal/src/can/frame.rs

imxrt-hal/src/can/mod.rs

imxrt-hal/src/ccm.rs

imxrt-hal/src/can/mod.rs

artifacts of non-existent feature: imxrt-rs#122 (comment) remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment)

dstric-aqueduct · 2022-12-12T21:45:44Z

Thanks for putting this together. My first pass is a brief code study. I'm not too familiar with this peripheral, but I'll try to get some time to study the FlexCAN chapter in the reference manual.

I notice that we're re-naming the package and files. I'm guessing that's to support Teensy 4 prototyping. If that's the case, would you mind rebasing this branch onto the maint-v0.4 branch, then re-targeting the PR to maint-v0.4 (edit the PR, and change the base branch)? Once this happens, we won't have to re-name all these files, and it will simplify integration and release into the 0.4 HAL.

My review include considerations for #121. Once we're in a good state, I can port this driver into the next HAL.

Hey Ryan - first, a big thanks to you and Tom for all the work on these projects! They're fantastic!

I merged the maint-v0.4 branch into the dev/can branch and then re-targeted to the maint-v0.4 branch for the PR. I think the new file diffs are only the Can feature additions at this point.

see: imxrt-rs#122 (comment)

teburd · 2022-12-13T14:27:46Z

Thanks for submitting this! It has been a requested feature by several people and it is great to see it being contributed.

I'd note that the commit set should be rebased, probably squashed a bit, and cleaned up before merging to make looking at the history a bit easier to understand. Commits with one word descriptions aren't going to be all that helpful if we ever need to bisect/blame/etc. Really most of this work I'd think could be squashed down into a couple of commits with a nice commit message describing the flexcan driver being added, how it works, and why.

Happy holidays! Again thank you very much for contributing this.

- remove artifacts of non-existent feature: imxrt-rs#122 (comment) - remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment) - fix to add Can to ccm mod - remove const def of base registers - fix to hard code Can clock source to OSC see: imxrt-rs#122 (comment) - update to add new iomuxc crate

updates Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs Update mod.rs update update Update mod.rs Update mod.rs update Update isotp.rs update update Update id.rs update update Update mod.rs update Update mod.rs update mask update update init refactor updates update Update frame.rs update rename package package update resolve PR Issues - remove artifacts of non-existent feature: imxrt-rs#122 (comment) - remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment) - fix to add Can to ccm mod - remove const def of base registers - fix to hard code Can clock source to OSC see: imxrt-rs#122 (comment) - update to add new iomuxc crate

commit 68677eb Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 16:21:30 2022 -0500 resolve PR Issues artifacts of non-existent feature: imxrt-rs#122 (comment) remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment) commit 081d027 Merge: 2ab80a7 6da6c97 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 16:00:55 2022 -0500 Merge branch 'dev/can' into maint-v0.4 commit 6da6c97 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 10:03:39 2022 -0500 package update commit 111f429 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 09:59:11 2022 -0500 rename package commit e071a4d Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 07:28:15 2022 -0500 update commit 13b396c Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Dec 10 13:12:28 2022 -0500 Update frame.rs commit 118d51e Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Dec 10 11:53:47 2022 -0500 update commit e51d7dc Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Dec 9 13:24:22 2022 -0500 updates commit e9d8df8 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 8 07:34:16 2022 -0500 init refactor commit 8831af2 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Dec 7 14:40:45 2022 -0500 update commit b4b52d1 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Dec 7 07:03:21 2022 -0500 mask update commit fef5223 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Tue Dec 6 20:04:47 2022 -0500 update commit bc428c0 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Tue Dec 6 05:39:18 2022 -0500 Update mod.rs commit adbd1bd Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Dec 2 07:48:31 2022 -0500 update commit 4ab5ee0 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 16:07:04 2022 -0500 Update mod.rs commit 8026f2a Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 12:14:10 2022 -0500 update commit 588ac9b Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 08:35:08 2022 -0500 update commit 486a7c4 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 13:22:08 2022 -0500 Update id.rs commit b0e15d7 Merge: 687af5b 0ec2e73 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:43:22 2022 -0500 Merge branch 'dev/can' of https://github.com/dstric-aqueduct/imxrt-hal into dev/can commit 687af5b Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:43:20 2022 -0500 update commit 0ec2e73 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:41:53 2022 -0500 update commit a12871c Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 28 10:21:22 2022 -0500 Update isotp.rs commit 52934a6 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 08:02:55 2022 -0500 update commit 78183fc Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 07:09:41 2022 -0500 Update mod.rs commit c367a4e Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 06:53:55 2022 -0500 Update mod.rs commit ff22943 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 18:41:20 2022 -0500 update commit 037b404 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 07:11:48 2022 -0500 update commit ae00b21 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 06:08:08 2022 -0500 Update mod.rs commit a9e80e8 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Nov 25 06:03:13 2022 -0500 Update mod.rs commit 284997f Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Nov 24 10:51:20 2022 -0500 Update mod.rs commit ecca971 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 18:25:35 2022 -0500 Update mod.rs commit 1de0d0c Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 18:23:39 2022 -0500 Update mod.rs commit 5bf1d98 Merge: 1ebb9e6 0ef6987 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 05:51:14 2022 -0500 Merge branch 'dev/can' of https://github.com/dstric-aqueduct/imxrt-hal into dev/can commit 1ebb9e6 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 05:48:57 2022 -0500 Update mod.rs commit 0ef6987 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 19:22:07 2022 -0500 Update mod.rs commit 83c0c2a Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 15:43:32 2022 -0500 Update mod.rs commit 6e16125 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 14:24:56 2022 -0500 Update mod.rs commit e27f4d5 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 10:04:34 2022 -0500 Update mod.rs commit 10a66d2 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 07:23:49 2022 -0500 updates commit 6362ad6 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Nov 17 13:52:52 2022 -0500 init commit 2ab80a7 Author: Alex Halemba <alex-halemba@gmx.de> Date: Sun Jan 9 23:21:22 2022 +0100 impr. docs commit 90f36ef Author: Alex Halemba <alex-halemba@gmx.de> Date: Sat Jan 8 23:03:38 2022 +0100 review commit 1322f91 Author: Alex Halemba <alex-halemba@gmx.de> Date: Thu Jan 6 20:02:23 2022 +0100 use modify_reg commit 386b680 Author: Alex Halemba <alex-halemba@gmx.de> Date: Thu Jan 6 18:07:02 2022 +0100 review fixes commit 229d3ae Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 21:27:43 2022 +0100 figuring out that ```ignore fixed the pipeline commit be68c9c Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 11:16:16 2022 +0100 fixing documentation commit 173b525 Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 11:08:00 2022 +0100 changing to mC to avoid f32 commit 5daf3cc Author: Alex Halemba <alex-halemba@gmx.de> Date: Tue Jan 4 19:52:55 2022 +0100 add tempmon support commit 9b85614 Author: Alex Halemba <alex-halemba@gmx.de> Date: Tue Jan 4 19:00:32 2022 +0100 add tempmon commit 08aa861 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:15:32 2021 -0500 Bump HAL version to 0.4.5 commit 7437482 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:11:59 2021 -0500 Document 0.4.5 release in CHANGELOG commit 50d3677 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:04:01 2021 -0500 Update CHANGELOG with TRNG error code fix commit 18fabf3 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Thu Dec 2 00:08:59 2021 -0800 Follow rand_core API commit 9a3727f Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 13:24:38 2021 -0400 Add GPIO interrupt documentation, code snippet Documentation and examples came from development discussions. See discussions on imxrt-rs#109 for details. commit 7121735 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 12:40:25 2021 -0400 Update CHANGELOG commit 44c76a7 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 11:10:37 2021 -0400 Implement icr_mask for GPIO inputs commit f69bd80 Author: Martin Algesten <martin@algesten.se> Date: Mon Jul 12 22:51:50 2021 +0200 Update imxrt1060-hal/src/gpio.rs Co-authored-by: Ian McIntyre <ianpmcintyre@gmail.com> commit 7218aa2 Author: Martin Algesten <martin@algesten.se> Date: Mon Jul 5 22:37:45 2021 +0200 Fix error 032 vs 0u32 commit 87bc829 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 11:13:08 2021 +0200 Clear out interrupt config when transitioning to output commit 7259132 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 11:12:45 2021 +0200 Preserve interrupt config on set_fast() commit 5a158ff Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 10:50:35 2021 +0200 Amends after PR feedback commit 1703b81 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 10:43:24 2021 +0200 Update imxrt1060-hal/src/gpio.rs Co-authored-by: Ian McIntyre <ianpmcintyre@gmail.com> commit 9bab8d3 Author: Martin Algesten <martin@algesten.se> Date: Wed Jun 30 17:22:02 2021 +0200 GPIO functions to enable / configure interrupts cortex_m_rt provides the hook for the ISR and the `NVIC::unmask`, however to configure a GPIO interrupt there are some additional steps needed. This commit provides set_interrupt_enable, set_interrupt_configuration and clear_interrupt_status (and some additional query functions). commit e6e9e47 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Jun 28 22:11:08 2021 -0400 Isolate fast / normal GPIO configuration copy The new implementation is consistent with the previous behavior. We're setting the stage for copying over interrupt settings. commit b79b4de Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Jun 28 21:57:31 2021 -0400 Rename GPIO "offset" to "mask" The usage resembles a bitmask with a single set bit. The name is easier to reason about. commit cd6e3f5 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Fri Apr 23 18:42:43 2021 -0400 Bump imxrt-ral to 0.4.4 commit f9c58fe Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Fri Apr 23 18:41:09 2021 -0400 Document 0.4.4 release date in CHANGELOG Fix 0.4.3 release date (wrong year). commit 418e97c Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Apr 22 20:33:53 2021 -0400 Update CHANGELOG with PWM fix commit 29cc21a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Apr 22 20:25:23 2021 -0400 Prepare PWM pins when constructing outputs In the 0.3 HAL, we relied on the user to set the pin alternate settings. But after introducing the IOMUXC crate in 0.4, we made pin muxing part of the driver's responsibility, and added calls to prepare pins. We missed the requirement in the PWM driver. This commit corrects the PWM driver, which has been broken since the 0.4 release. Tested in the teensy4-rs repo. Users who are not able to adopt the next patch release could add equivalent iomuxc calls before constructing their PWM driver. commit 124a811 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Apr 5 20:20:00 2021 -0400 Bump imxrt-hal to 0.4.3 commit 98c8cbd Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Apr 5 20:19:35 2021 -0400 Add 0.4.3 CHANGELOG entry commit 2a97740 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:50:56 2021 -0400 Update CHANGELOG commit 4935e6a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:21:23 2021 -0400 Allow deprecated atomic::spin_loop_hint() Clippy suggests that we start using core::hint::spin_loop(). This new function was introduced in Rust 1.49, and replaces spin_loop_hint(). We're not going to issue that breaking change right now. So, we'll mark the existing usages as OK. TODO: - Pin a clippy, compiler, toolchain version in CI - Figure out a MSRV, maybe commit 27d8518 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:18:32 2021 -0400 Allow upper case names, acronyms New clippy is very aggressive about proper naming. We're not following proper naming in the 0.4 HAL. Disable the warnings for now. commit 2658b74 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 21:33:38 2021 -0400 Address clippy warnings in AdcSource commit be6006e Author: Lane Kolbly <lane@rscheme.org> Date: Sun Mar 28 10:15:10 2021 -0500 Implement ADC DMA source This commit makes the ADCs a possible source for DMA operations. commit 8f457ed Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 20:10:44 2021 -0400 Update CHANGELOG commit 227f375 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 20:06:14 2021 -0400 Add CI for 1061, 1064 features commit e3c77a0 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 19:59:05 2021 -0400 Add support for the 1061 See the data sheet for differences. One notable change is that the 1061 doesn't have the graphics features (LCD, CSI, pixel pipeline). We don't have drivers for these peripherals today, so the HAL can support these features without issue. commit 5256dd9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Mar 20 19:46:39 2021 -0400 Enable the imxrt1064 feature The HAL builds with the `imxrt1064` feature: cd imxrt-hal cargo build --features imxrt1064 It has not been tested on hardware. Only thing that seems to change is the FlexSPI2 IOMUXC registers are reserved. Everything else is the same. commit 357a71a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:36:06 2020 -0500 Bump imxrt-hal to 0.4.2 commit f8514f9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:40:10 2020 -0500 Update CHANGELOG commit 61dccd9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:33:40 2020 -0500 Explicitly depend on imxrt-iomuxc 0.1.2 That release introduces the ADC pins, which are required for the current HAL. commit c4a4111 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:30:58 2020 -0500 Update README and release docs The documentation in this branch should still be useful. This commit revises our documentation to reflect the broader imxrt-rs org. commit 0567ab4 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:08:25 2020 -0500 Remove iomuxc crate from 0.4 branch It's been moved to a separate repo. This change is to prevent someone from accidentally releasing the iomuxc crate from this repo. commit 8efe35c Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 20:44:37 2020 -0500 Remove RAL from 0.4 branch Manually removing the RAL, since it's already been removed in master. This is to ensure that we don't accidentally depend on something in this 0.4 maintenance branch that isn't correctly reflected in our RAL repo. commit bf0bbfa Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:39:22 2020 -0500 Fix CHANGELOG entrie for unreleased fixes Added the error correction to the wrong "Fix" header commit f1301cc Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:27:38 2020 -0500 Update CHANGELOG describing fix for errors commit 429b9fa Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Nov 15 08:41:46 2020 -0800 Only allow HAL to create I2C/SPI config errors commit 0878f7a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:34:32 2020 -0500 Update CHANGELOG with TRNG addition commit c697e69 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Nov 17 11:43:32 2020 -0800 Fix comment, don't preserve bad value commit 7470642 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Nov 15 08:33:16 2020 -0800 Preserve settings, fix error privacy commit 12dba78 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sat Nov 14 06:05:44 2020 -0800 Add optional RngCore impl commit 51f4644 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Fri Oct 9 03:23:32 2020 -0700 Implement basic support for the TRNG Limited configurability but it works. commit f819cc5 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Oct 15 18:52:25 2020 -0400 hal: add CHANGELOG entry for ADC feature commit de9cdca Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 14 21:46:21 2020 -0400 (Hopefully) removed Cargo.toml from changes commit 93bb6cd Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 14 20:40:34 2020 -0400 Implemented suggestions commit fdae6ed Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 7 13:06:54 2020 -0400 3rd time's a charm, fix CI issues commit b2335df Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 7 12:41:52 2020 -0400 Hopefully actually fixed build issues commit 8a966bc Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 22:54:22 2020 -0400 Fixed issues from checks commit 88d02cd Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 22:36:58 2020 -0400 Finished up comments & example commit 1f6aa15 Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 00:16:22 2020 -0400 Changed AnalogPin creation commit 22ac89b Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 21:12:12 2020 -0400 Added adc to peripherals commit 684592e Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 21:05:44 2020 -0400 Added input data for all IMXRT106x pins commit 744ce70 Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 20:58:36 2020 -0400 Potential ADC implementation take 1 commit 3f98a20 Author: DavidTheFighter <19dallen@gmail.com> Date: Sun Oct 4 23:54:02 2020 -0400 Transfer work to fork commit b7a1a56 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Oct 10 20:58:36 2020 -0400 imxrt-hal: add CHANGELOG entry for SRTC commit 24b73db Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Thu Oct 8 22:32:09 2020 -0700 Update following review commit f9b71bd Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Oct 6 17:00:38 2020 -0700 Use microseconds, add get_with_micros commit 0bea36d Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Oct 6 14:02:07 2020 -0700 Revert "Add get_f64" This reverts commit aec0ed6. commit 597a113 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Oct 4 22:37:34 2020 -0700 Add get_f64 commit 665e1c8 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Oct 4 21:28:19 2020 -0700 Update for review and sub-second times Now exclusively enables and uses the SRTC. commit 72f57aa Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Fri Oct 2 17:04:38 2020 -0700 Implement basic RTC support Supports enabling and setting the clocks. commit f77c16a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 08:01:34 2020 -0400 hal: Prepare release 0.4.1 commit c1a7d32 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:51:33 2020 -0400 hal: Add CHANGELOG entry for GPIO fast mode fix commit c8ff33f Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:48:16 2020 -0400 gpio: Clarify 'state' in set_fast() documentation commit 887a8e1 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:33:48 2020 -0400 gpio: Fix GPIO high-speed state inconsistency There are two valid ways to prepare a high-speed GPIO output: ```rust pub fn configure_led(pad: LedPadType) -> LED { let mut led = hal::gpio::GPIO::new(pad); led.set_fast(true); led.output() } ``` and ```rust pub fn configure_led(pad: LedPadType) -> LED { let mut led = hal::gpio::GPIO::new(pad).output(); led.set_fast(true); led } ``` the former will put the GPIO into high-speed, or 'fast,' mode before setting 'output mode.' The latter will put the GPIO into output mode before fast mode. After transitioning into fast mode, the GPIO will start to reference a different GPIO register block. The issue is that, after entering fast mode, the output / input state of the pin is not maintained. In the second snippet, the set_fast(true) call ends up reverting the GPIO state back to 'input,' since the newly-referenced register block does not maintain the same GPIO input / output configuration. This commit updates the set_fast() method to maintain the GPIO I/O state for the new register block. It makes it so that either of the above patterns work.

remove const def of base registers fix to hard code Can clock source to OSC see: imxrt-rs#122 (comment) Squashed commit of the following: commit 68677eb Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 16:21:30 2022 -0500 resolve PR Issues artifacts of non-existent feature: imxrt-rs#122 (comment) remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment) commit 081d027 Merge: 2ab80a7 6da6c97 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 16:00:55 2022 -0500 Merge branch 'dev/can' into maint-v0.4 commit 6da6c97 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 10:03:39 2022 -0500 package update commit 111f429 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 09:59:11 2022 -0500 rename package commit e071a4d Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Dec 12 07:28:15 2022 -0500 update commit 13b396c Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Dec 10 13:12:28 2022 -0500 Update frame.rs commit 118d51e Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Dec 10 11:53:47 2022 -0500 update commit e51d7dc Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Dec 9 13:24:22 2022 -0500 updates commit e9d8df8 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 8 07:34:16 2022 -0500 init refactor commit 8831af2 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Dec 7 14:40:45 2022 -0500 update commit b4b52d1 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Dec 7 07:03:21 2022 -0500 mask update commit fef5223 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Tue Dec 6 20:04:47 2022 -0500 update commit bc428c0 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Tue Dec 6 05:39:18 2022 -0500 Update mod.rs commit adbd1bd Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Dec 2 07:48:31 2022 -0500 update commit 4ab5ee0 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 16:07:04 2022 -0500 Update mod.rs commit 8026f2a Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 12:14:10 2022 -0500 update commit 588ac9b Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Dec 1 08:35:08 2022 -0500 update commit 486a7c4 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 13:22:08 2022 -0500 Update id.rs commit b0e15d7 Merge: 687af5b 0ec2e73 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:43:22 2022 -0500 Merge branch 'dev/can' of https://github.com/dstric-aqueduct/imxrt-hal into dev/can commit 687af5b Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:43:20 2022 -0500 update commit 0ec2e73 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 30 06:41:53 2022 -0500 update commit a12871c Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 28 10:21:22 2022 -0500 Update isotp.rs commit 52934a6 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 08:02:55 2022 -0500 update commit 78183fc Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 07:09:41 2022 -0500 Update mod.rs commit c367a4e Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sun Nov 27 06:53:55 2022 -0500 Update mod.rs commit ff22943 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 18:41:20 2022 -0500 update commit 037b404 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 07:11:48 2022 -0500 update commit ae00b21 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Sat Nov 26 06:08:08 2022 -0500 Update mod.rs commit a9e80e8 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Fri Nov 25 06:03:13 2022 -0500 Update mod.rs commit 284997f Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Nov 24 10:51:20 2022 -0500 Update mod.rs commit ecca971 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 18:25:35 2022 -0500 Update mod.rs commit 1de0d0c Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 18:23:39 2022 -0500 Update mod.rs commit 5bf1d98 Merge: 1ebb9e6 0ef6987 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 05:51:14 2022 -0500 Merge branch 'dev/can' of https://github.com/dstric-aqueduct/imxrt-hal into dev/can commit 1ebb9e6 Author: dstric-aqueduct <96876452+dstric-aqueduct@users.noreply.github.com> Date: Wed Nov 23 05:48:57 2022 -0500 Update mod.rs commit 0ef6987 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 19:22:07 2022 -0500 Update mod.rs commit 83c0c2a Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 15:43:32 2022 -0500 Update mod.rs commit 6e16125 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 14:24:56 2022 -0500 Update mod.rs commit e27f4d5 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 10:04:34 2022 -0500 Update mod.rs commit 10a66d2 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Mon Nov 21 07:23:49 2022 -0500 updates commit 6362ad6 Author: djstrickland <96876452+dstric-aqueduct@users.noreply.github.com> Date: Thu Nov 17 13:52:52 2022 -0500 init commit 2ab80a7 Author: Alex Halemba <alex-halemba@gmx.de> Date: Sun Jan 9 23:21:22 2022 +0100 impr. docs commit 90f36ef Author: Alex Halemba <alex-halemba@gmx.de> Date: Sat Jan 8 23:03:38 2022 +0100 review commit 1322f91 Author: Alex Halemba <alex-halemba@gmx.de> Date: Thu Jan 6 20:02:23 2022 +0100 use modify_reg commit 386b680 Author: Alex Halemba <alex-halemba@gmx.de> Date: Thu Jan 6 18:07:02 2022 +0100 review fixes commit 229d3ae Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 21:27:43 2022 +0100 figuring out that ```ignore fixed the pipeline commit be68c9c Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 11:16:16 2022 +0100 fixing documentation commit 173b525 Author: Alex Halemba <alex-halemba@gmx.de> Date: Wed Jan 5 11:08:00 2022 +0100 changing to mC to avoid f32 commit 5daf3cc Author: Alex Halemba <alex-halemba@gmx.de> Date: Tue Jan 4 19:52:55 2022 +0100 add tempmon support commit 9b85614 Author: Alex Halemba <alex-halemba@gmx.de> Date: Tue Jan 4 19:00:32 2022 +0100 add tempmon commit 08aa861 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:15:32 2021 -0500 Bump HAL version to 0.4.5 commit 7437482 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:11:59 2021 -0500 Document 0.4.5 release in CHANGELOG commit 50d3677 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Dec 2 19:04:01 2021 -0500 Update CHANGELOG with TRNG error code fix commit 18fabf3 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Thu Dec 2 00:08:59 2021 -0800 Follow rand_core API commit 9a3727f Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 13:24:38 2021 -0400 Add GPIO interrupt documentation, code snippet Documentation and examples came from development discussions. See discussions on imxrt-rs#109 for details. commit 7121735 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 12:40:25 2021 -0400 Update CHANGELOG commit 44c76a7 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Sep 18 11:10:37 2021 -0400 Implement icr_mask for GPIO inputs commit f69bd80 Author: Martin Algesten <martin@algesten.se> Date: Mon Jul 12 22:51:50 2021 +0200 Update imxrt1060-hal/src/gpio.rs Co-authored-by: Ian McIntyre <ianpmcintyre@gmail.com> commit 7218aa2 Author: Martin Algesten <martin@algesten.se> Date: Mon Jul 5 22:37:45 2021 +0200 Fix error 032 vs 0u32 commit 87bc829 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 11:13:08 2021 +0200 Clear out interrupt config when transitioning to output commit 7259132 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 11:12:45 2021 +0200 Preserve interrupt config on set_fast() commit 5a158ff Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 10:50:35 2021 +0200 Amends after PR feedback commit 1703b81 Author: Martin Algesten <martin@algesten.se> Date: Sun Jul 4 10:43:24 2021 +0200 Update imxrt1060-hal/src/gpio.rs Co-authored-by: Ian McIntyre <ianpmcintyre@gmail.com> commit 9bab8d3 Author: Martin Algesten <martin@algesten.se> Date: Wed Jun 30 17:22:02 2021 +0200 GPIO functions to enable / configure interrupts cortex_m_rt provides the hook for the ISR and the `NVIC::unmask`, however to configure a GPIO interrupt there are some additional steps needed. This commit provides set_interrupt_enable, set_interrupt_configuration and clear_interrupt_status (and some additional query functions). commit e6e9e47 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Jun 28 22:11:08 2021 -0400 Isolate fast / normal GPIO configuration copy The new implementation is consistent with the previous behavior. We're setting the stage for copying over interrupt settings. commit b79b4de Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Jun 28 21:57:31 2021 -0400 Rename GPIO "offset" to "mask" The usage resembles a bitmask with a single set bit. The name is easier to reason about. commit cd6e3f5 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Fri Apr 23 18:42:43 2021 -0400 Bump imxrt-ral to 0.4.4 commit f9c58fe Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Fri Apr 23 18:41:09 2021 -0400 Document 0.4.4 release date in CHANGELOG Fix 0.4.3 release date (wrong year). commit 418e97c Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Apr 22 20:33:53 2021 -0400 Update CHANGELOG with PWM fix commit 29cc21a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Apr 22 20:25:23 2021 -0400 Prepare PWM pins when constructing outputs In the 0.3 HAL, we relied on the user to set the pin alternate settings. But after introducing the IOMUXC crate in 0.4, we made pin muxing part of the driver's responsibility, and added calls to prepare pins. We missed the requirement in the PWM driver. This commit corrects the PWM driver, which has been broken since the 0.4 release. Tested in the teensy4-rs repo. Users who are not able to adopt the next patch release could add equivalent iomuxc calls before constructing their PWM driver. commit 124a811 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Apr 5 20:20:00 2021 -0400 Bump imxrt-hal to 0.4.3 commit 98c8cbd Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Apr 5 20:19:35 2021 -0400 Add 0.4.3 CHANGELOG entry commit 2a97740 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:50:56 2021 -0400 Update CHANGELOG commit 4935e6a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:21:23 2021 -0400 Allow deprecated atomic::spin_loop_hint() Clippy suggests that we start using core::hint::spin_loop(). This new function was introduced in Rust 1.49, and replaces spin_loop_hint(). We're not going to issue that breaking change right now. So, we'll mark the existing usages as OK. TODO: - Pin a clippy, compiler, toolchain version in CI - Figure out a MSRV, maybe commit 27d8518 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 22:18:32 2021 -0400 Allow upper case names, acronyms New clippy is very aggressive about proper naming. We're not following proper naming in the 0.4 HAL. Disable the warnings for now. commit 2658b74 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Wed Mar 31 21:33:38 2021 -0400 Address clippy warnings in AdcSource commit be6006e Author: Lane Kolbly <lane@rscheme.org> Date: Sun Mar 28 10:15:10 2021 -0500 Implement ADC DMA source This commit makes the ADCs a possible source for DMA operations. commit 8f457ed Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 20:10:44 2021 -0400 Update CHANGELOG commit 227f375 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 20:06:14 2021 -0400 Add CI for 1061, 1064 features commit e3c77a0 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Mar 22 19:59:05 2021 -0400 Add support for the 1061 See the data sheet for differences. One notable change is that the 1061 doesn't have the graphics features (LCD, CSI, pixel pipeline). We don't have drivers for these peripherals today, so the HAL can support these features without issue. commit 5256dd9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Mar 20 19:46:39 2021 -0400 Enable the imxrt1064 feature The HAL builds with the `imxrt1064` feature: cd imxrt-hal cargo build --features imxrt1064 It has not been tested on hardware. Only thing that seems to change is the FlexSPI2 IOMUXC registers are reserved. Everything else is the same. commit 357a71a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:36:06 2020 -0500 Bump imxrt-hal to 0.4.2 commit f8514f9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:40:10 2020 -0500 Update CHANGELOG commit 61dccd9 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:33:40 2020 -0500 Explicitly depend on imxrt-iomuxc 0.1.2 That release introduces the ADC pins, which are required for the current HAL. commit c4a4111 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:30:58 2020 -0500 Update README and release docs The documentation in this branch should still be useful. This commit revises our documentation to reflect the broader imxrt-rs org. commit 0567ab4 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Tue Nov 17 19:08:25 2020 -0500 Remove iomuxc crate from 0.4 branch It's been moved to a separate repo. This change is to prevent someone from accidentally releasing the iomuxc crate from this repo. commit 8efe35c Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 20:44:37 2020 -0500 Remove RAL from 0.4 branch Manually removing the RAL, since it's already been removed in master. This is to ensure that we don't accidentally depend on something in this 0.4 maintenance branch that isn't correctly reflected in our RAL repo. commit bf0bbfa Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:39:22 2020 -0500 Fix CHANGELOG entrie for unreleased fixes Added the error correction to the wrong "Fix" header commit f1301cc Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:27:38 2020 -0500 Update CHANGELOG describing fix for errors commit 429b9fa Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Nov 15 08:41:46 2020 -0800 Only allow HAL to create I2C/SPI config errors commit 0878f7a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Mon Nov 16 19:34:32 2020 -0500 Update CHANGELOG with TRNG addition commit c697e69 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Nov 17 11:43:32 2020 -0800 Fix comment, don't preserve bad value commit 7470642 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Nov 15 08:33:16 2020 -0800 Preserve settings, fix error privacy commit 12dba78 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sat Nov 14 06:05:44 2020 -0800 Add optional RngCore impl commit 51f4644 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Fri Oct 9 03:23:32 2020 -0700 Implement basic support for the TRNG Limited configurability but it works. commit f819cc5 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Thu Oct 15 18:52:25 2020 -0400 hal: add CHANGELOG entry for ADC feature commit de9cdca Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 14 21:46:21 2020 -0400 (Hopefully) removed Cargo.toml from changes commit 93bb6cd Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 14 20:40:34 2020 -0400 Implemented suggestions commit fdae6ed Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 7 13:06:54 2020 -0400 3rd time's a charm, fix CI issues commit b2335df Author: DavidTheFighter <19dallen@gmail.com> Date: Wed Oct 7 12:41:52 2020 -0400 Hopefully actually fixed build issues commit 8a966bc Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 22:54:22 2020 -0400 Fixed issues from checks commit 88d02cd Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 22:36:58 2020 -0400 Finished up comments & example commit 1f6aa15 Author: DavidTheFighter <19dallen@gmail.com> Date: Tue Oct 6 00:16:22 2020 -0400 Changed AnalogPin creation commit 22ac89b Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 21:12:12 2020 -0400 Added adc to peripherals commit 684592e Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 21:05:44 2020 -0400 Added input data for all IMXRT106x pins commit 744ce70 Author: DavidTheFighter <19dallen@gmail.com> Date: Mon Oct 5 20:58:36 2020 -0400 Potential ADC implementation take 1 commit 3f98a20 Author: DavidTheFighter <19dallen@gmail.com> Date: Sun Oct 4 23:54:02 2020 -0400 Transfer work to fork commit b7a1a56 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sat Oct 10 20:58:36 2020 -0400 imxrt-hal: add CHANGELOG entry for SRTC commit 24b73db Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Thu Oct 8 22:32:09 2020 -0700 Update following review commit f9b71bd Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Oct 6 17:00:38 2020 -0700 Use microseconds, add get_with_micros commit 0bea36d Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Tue Oct 6 14:02:07 2020 -0700 Revert "Add get_f64" This reverts commit aec0ed6. commit 597a113 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Oct 4 22:37:34 2020 -0700 Add get_f64 commit 665e1c8 Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Sun Oct 4 21:28:19 2020 -0700 Update for review and sub-second times Now exclusively enables and uses the SRTC. commit 72f57aa Author: Malloc Voidstar <1284317+AlyoshaVasilieva@users.noreply.github.com> Date: Fri Oct 2 17:04:38 2020 -0700 Implement basic RTC support Supports enabling and setting the clocks. commit f77c16a Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 08:01:34 2020 -0400 hal: Prepare release 0.4.1 commit c1a7d32 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:51:33 2020 -0400 hal: Add CHANGELOG entry for GPIO fast mode fix commit c8ff33f Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:48:16 2020 -0400 gpio: Clarify 'state' in set_fast() documentation commit 887a8e1 Author: Ian McIntyre <ianpmcintyre@gmail.com> Date: Sun Sep 13 07:33:48 2020 -0400 gpio: Fix GPIO high-speed state inconsistency There are two valid ways to prepare a high-speed GPIO output: ```rust pub fn configure_led(pad: LedPadType) -> LED { let mut led = hal::gpio::GPIO::new(pad); led.set_fast(true); led.output() } ``` and ```rust pub fn configure_led(pad: LedPadType) -> LED { let mut led = hal::gpio::GPIO::new(pad).output(); led.set_fast(true); led } ``` the former will put the GPIO into high-speed, or 'fast,' mode before setting 'output mode.' The latter will put the GPIO into output mode before fast mode. After transitioning into fast mode, the GPIO will start to reference a different GPIO register block. The issue is that, after entering fast mode, the output / input state of the pin is not maintained. In the second snippet, the set_fast(true) call ends up reverting the GPIO state back to 'input,' since the newly-referenced register block does not maintain the same GPIO input / output configuration. This commit updates the set_fast() method to maintain the GPIO I/O state for the new register block. It makes it so that either of the above patterns work.

dstric-aqueduct · 2022-12-14T09:48:40Z

Well...it appears my attempts to squash the fork commit history did not go well as there are now a bunch of file diffs. Ian, Tom - I'll leave it to you on the best way to go about making the PR history clean.

mciantyre

Here's how I would try to clean up the history. I encourage you to take some time to try this out, and see how it works. This isn't the rebase that Tom and I suggested, but it's a quick way to achieve the same outcome and simplify the history.

git reset --soft maint-v0.4

After this, the CAN-specific changes (the contents of this diff, as I write this) are in the index. You can see the changes with git status. Also, the HEAD of dev/can is now maint-0.4.
git commit -m "Prototype a FlexCAN peripheral"

I agree with Tom that having more content in the commit message is helpful. I'll leave that to you.
git push [your-remote-name] dev/can --force

After this, that one new commit from 2 appears in the PR.

imxrt-hal/src/can/frame.rs

imxrt-hal/src/can/id.rs

imxrt-hal/src/can/mod.rs

Implementation of the FlexCAN1 and FlexCAN2 peripherals for the NXP i.MX RT 1060 processor. Includes APIs for initializing the peripherals, setting the clock source, setting mailbox receive filters, setting mailbox FIFO functionality, and receiving and transmitting frames. The FlexCAN3 peripheral is not implemented.

- Remove StandardId and ExtendedId structs in favor of embedded-hal - convert TryFrom to From for FlexCanMailboxCSCode

mciantyre

Sorry, but I'm pausing my review until we simplify the commit history and change how we apply revisions. I notice that corrections are changing back to their pre-review state. See my latest comment on the id.rs file. I'm concerned that this might happen with harder-to-notice, important revisions.

If cleaning up the history is troublesome, I can provide a starting point. I pushed a dev/can branch to the main repository with a simplified history and a base on maint-v0.4. I'll stress that this is just a starting point; I may not have integrated all the changes you expect.

If that branch looks reasonable, I recommend using it for development and review. You can fetch the branch, locally re-name it to dev/can, then force-push it over your remote's dev/can branch to update this PR.

imxrt-hal/src/can/id.rs

dstric-aqueduct · 2022-12-19T17:38:56Z

Sorry, but I'm pausing my review until we simplify the commit history and change how we apply revisions. I notice that corrections are changing back to their pre-review state. See my latest comment on the id.rs file. I'm concerned that this might happen with harder-to-notice, important revisions.

If cleaning up the history is troublesome, I can provide a starting point. I pushed a dev/can branch to the main repository with a simplified history and a base on maint-v0.4. I'll stress that this is just a starting point; I may not have integrated all the changes you expect.

If that branch looks reasonable, I recommend using it for development and review. You can fetch the branch, locally re-name it to dev/can, then force-push it over your remote's dev/can branch to update this PR.

Hey Ian - thanks for creating the dev/can branch in the main repo. I was able to force-push to the remote's branch so I think we're finally in sync now.

mciantyre

Updated branch looks great. Thanks for working through the clean-up.

CI is detecting build errors. I can also reproduce build errors locally. We'll need a passing build for the CAN contributions.

When clippy kicks in, it will detect warnings for existing, non-CAN code. Please ignore those warnings; I've addressed those warnings on the maint-v0.4 branch in this repo. Unless you'd like to rebase this branch onto those commits, I'll make sure that this branch's CI is green for all other code. I appreciate your help addressing clippy warnings for CAN code.

imxrt-hal/Cargo.toml

imxrt-hal/src/can/embedded_hal.rs

imxrt-hal/src/can/frame.rs

imxrt-hal/src/can/mod.rs

1060 pins implementaions checked against section 44.3 in the 1060 reference manual. See imxrt-rs/imxrt-hal#122 for a related FlexCAN driver.

1060 pins implementations checked against section 44.3 in the 1060 reference manual. See imxrt-rs/imxrt-hal#122 for a related FlexCAN driver.

- added bounds checks on StandardID and ExtendedID for creation of IdReg - improved Error descriptiveness - added docs to Frame timestamp field - Update Cargo.toml

imxrt-hal/src/can/mod.rs

mciantyre · 2022-12-27T19:30:17Z

imxrt-hal/src/can/mod.rs

+    pub fn set_fifo_filter_2(&mut self, filter: filter::FlexCanFilter) {
+        self.set_fifo_filter(filter.filter_id, filter.id, filter.ide, filter.remote)
+    }


Could we make this method the only way to configure FIFO filters? I'm not sure I see a reason to support two different methods that only vary in the number of their arguments. We could also take filter by reference.

imxrt-hal/src/can/mod.rs

mciantyre · 2022-12-27T20:05:39Z

imxrt-hal/src/can/mod.rs

+            }
+            if (self.read_imask() & (1_u64 << self._mailbox_reader_index)) != 0 {
+                self._mailbox_reader_index += 1;
+                continue; /* don't read interrupt enabled mailboxes */


don't read interrupt enabled mailboxes

Is this documented somewhere for the user? Although handle_interrupt also returns a MailboxData, it might not be obvious that handle_interrupt is the only way that users should retrieve mailbox data when interrupts are enabled.

- fixed clock configuration in builder method and removed set_ccm_ccg method - removed unused `instance` method - removed duplicated `set_fifo_filter` method in favor of single method that accepts a `FlexCanFilter` as arg - removed dead code

Implementation of the FlexCAN1 and FlexCAN2 peripherals for the NXP i.MX RT 1060 processor. Includes APIs for initializing the peripherals, setting the clock source, setting mailbox receive filters, setting mailbox FIFO functionality, and receiving and transmitting frames. The FlexCAN3 peripheral is not implemented.

mciantyre

I rebased the branch onto maint-v0.4 to isolate clippy warnings, formatted the code to pass the next CI step, and collapsed into one commit.

I appreciate help addressing the 21 clippy warnings. You can reproduce them locally by checking out the updated branch, then running clippy like

cargo clippy --features=imxrt1062

If I'm left to fix these, I'll need clarity on the intent of some code; see inline comments.

imxrt-hal/src/can/mod.rs

mciantyre · 2022-12-29T21:14:37Z

imxrt-hal/src/can/mod.rs

+        if self.fifo_enabled() {
+            let max_mailbox = self.get_max_mailbox() as u32;
+            let num_rx_fifo_filters = (read_reg!(ral::can, self.reg, CTRL2, RFFN) + 1) * 2;
+            let remaining_mailboxes = max_mailbox - 6_u32 - num_rx_fifo_filters;


Is this 6_u32 the same as NUMBER_FIFO_RX_MAILBOXES?

…into dev/can

We need properly-formmated code to pass CI.

It can't automatically fix all the issues, but the remaining fixes are straightforward.

Use the fact that a bool is either a zero or a one to simplify the filter value. Warned by clippy, and implemented by hand.

mciantyre · 2023-01-02T15:06:53Z

imxrt-hal/src/can/mod.rs

+                    error = (baud - (clock_freq / (result * (divisor + 1)))) as i16;
+                    if error < 0 {
+                        error *= -1;
+                    }
+                    if error < best_error {
+                        best_error = error;
+                        best_divisor = divisor;
+                    }


Unsigned subtraction of baud and clock_freq / [...] -- before casting to i16 -- can overflow. This can cause a panic when building with default debug configurations.

[ERROR teensy4_panic]: panicked at 'attempt to subtract with overflow', /path/to/imxrt-hal/src/can/mod.rs:370:29

I can reproduce the panic in the teensy4-rs can.rs example (as of this commit). The snippet below shows how I'm building the example. I haven't stepped through the code to understand what specific iteration produces this panic.

cargo build --target=thumbv7em-none-eabihf --example=can --all-features

My first thought is to use something like abs_diff. However, if the absolute difference is larger than what fits in an i16, we'll truncate that difference once we cast from u32 to i16.

Could we revise this routine so that it's less likely to panic in debug builds?

Are the truncating casts to i16 necessary?

This has been updated to use the abs_diff method.

mciantyre · 2023-01-02T15:54:47Z

imxrt-hal/src/can/mod.rs

+//! can1.set_baud_rate(1_000_000);
+//! can1.set_max_mailbox(16);
+//! can1.enable_fifo();
+//! can1.set_fifo_interrupt(true);


Question about this API and behavior. I'm effectively testing this documentation example through the can.rs example proposed in the teensy4-rs repo (as of this commit). Here's what I'm trying:

I'm changing this driver configuration to false, and keeping all other can1 calls in the block the same.

can1.set_fifo_interrupt(false);

I'm then unmasking the CAN1 interrupt before the LED-toggling-CAN-I/O loop.

// NEW: unsafe { cortex_m::peripheral::NVIC::unmask(bsp::interrupt::CAN1) }; loop { /* Delay, toggle LED, read CAN mailboxes, send CAN frame */ }

I implementing the CAN1 ISR elsewhere in the example. It looks like

use bsp::interrupt; #[cortex_m_rt::interrupt] fn CAN1() { log::warn!("CAN1 interrupt fired"); }

I don't have the required SN65HVD230, so my CAN pins are not connected to anything.

I'm expecting step 1 to disable the CAN interrupts; that seems to be the only public method with something implying interrupt activation in the name. So even though I'm unmasking the CAN1 interrupt, I'm never expecting the ISR to activate.

But when I actually build and run this, I see that the CAN1 ISR is firing repeatedly. I'm connecting to the USB serial console to see all the log warnings.

Is there something else in the driver that's enabling interrupts, and can it be changed by the user? Or, am I using this driver incorrectly?

From the manual (pg 2553):

The module can generate up to 70 interrupt sources (64 interrupts due to message buffers
and 6 interrupts due to Ored interrupts from MBs, Bus Off, Error, Tx Warning, Rx
Warning and Wake Up)).

If the Rx FIFO is enabled (bit RFEN on MCR set), the interrupts corresponding to MBs 0
to 7 have a different behavior. Bit 7 of the IFLAG1 becomes the "FIFO Overflow" flag;
bit 6 becomes the FIFO Warning flag, bit 5 becomes the "Frames Available in FIFO flag"
and bits 4-0 are unused. See Interrupt Flags 1 Register (FLEXCAN_IFLAG1) for more
information.

A combined interrupt for all MBs is also generated by an Or of all the interrupt sources
from MBs. This interrupt gets generated when any of the Mailboxes or FIFO generates an
interrupt. The Arm must read the IFLAG Registers to determine which MB or FIFO
caused the interrupt.

The other 5 interrupt sources (Bus Off, Error, Tx Warning, Rx Warning and Wake Up
generate interrupts like the MB ones, and can be read from both the Error and Status
Register 1 and 2. The Bus Off, Error, Tx Warning and Rx Warning interrupt mask bits
are located in the Control 1 Register and the Wake-Up interrupt mask bit is located in the
MCR.

This method is currently only setting the BUF5I bit in IMASK1 register to interrupt when a frame is available (Frames Available in FIFO flag...):

If the Rx FIFO is not enabled, this bit flags the interrupt for MB5. If the Rx FIFO is enabled, this flag
indicates that at least one frame is available to be read from the Rx FIFO.
This flag is cleared by the FlexCAN whenever the bit MCR[RFEN] is changed by Arm writes

I agree this could be more transparent. More importantly, masking the interrupt vector for the interrupt reason would be beneficial.

This would let us debug why the interrupt is always firing for you (likely Bus Off with no transceiver attached.)

When I run the can.rs example in the teensy4-bsp project, it logs a few control registers before entering its I/O loop. Here's three register values I see, followed by a discussion of interrupt-specific register fields.

[INFO imxrt_hal::can]: MCR: 64EB300F

In MCR,

WRNEN is set. However, we're never setting CTRL1[TWRNMSK] or CTRL1[RWRNMSK], so (from what I can tell) we shouldn't observe an interrupt when error counters cross their threshold. If that's correct, I'm not sure we need to set WRNEN.

WAKMSK and SLFWAK are set. This means that we could trigger an interrupt when exiting doze or stop modes. (This definitely isn't happening in my limited testing, but it may be a non-obvious behavior of this driver.)

[INFO imxrt_hal::can]: CTRL1: 1624002

In CTRL1,

BOFFMSK is clear, so there's no "bus off" interrupt.

ERRMSK is set, so we generate an interrupt when ESR1[ERRINT] is high. This is a hasty observation, but a project-wide CTRL+F for "ESR1" shows no hits. This could indicate we're not clearing error interrupts.

TWRNMSK and RWRNMSK are both clear; see MCR[WRNEN] discussion, above.

[INFO imxrt_hal::can]: CTRL2: 870000

In CTRL2,

BOFFDONEMSK is clear, so there's no "bus off done" interrupt.

I'm not evaluating any message buffer interrupts right now. Nevertheless, I'm wary of ERRMSK being set, especially if we're not handling any error and status flags.

This commit corresponds to a FlexCAN PR review question in imxrt-hal. I'm sharing it to make reproduction easier. imxrt-rs/imxrt-hal#122 (comment)

myCatPlaysFetch · 2023-01-06T03:30:21Z

imxrt-hal/src/can/mod.rs

+
+    /// Write the registers of a mailbox.
+    #[inline(always)]
+    fn write_mailbox(


There are FlexCAN errata, at least on the RT1064, that require some extra precautions and/or workarounds. This function and elsewhere in the module would be affected. Those are 5641 (not on RT1064), 5829, 6032, and 9595. Should this driver be expected to know of and handle these errata? Or would there be more board-specific drivers for that? Overall excellent work, just curious how something like that is handled.

Thanks for helping with the review. If an erratum's workaround can act as the driver's default behavior, that would be ideal, and we should handle it here. This cuts down on configurations / code paths we maintain. But, if we need separate code paths to handle a driver's errata, we could consider crate configurations / separate driver crates / common- and chip-specific HAL combinations.

See PR Issue: imxrt-rs#122 (comment)

collin80 · 2023-02-07T00:46:50Z

The underlying hardware for the Teensy 4/4.1/Micromod supports 3 CAN buses, not two. Also, the third hardware bus is CAN-FD capable. It seems that currently your HAL doesn't have any concept of this third CAN bus. However, would this be possible to add? I realize that the addition of CAN-FD may complicate things. But, it is physically present on the chip so for teensy4-rs it would seem proper for it to eventually be supported.

I'm not entirely asking that "someone else do it for me" but kind of. I am toward the beginning of my rust journey so currently it may be difficult for me to take on such a thing by myself. However, I'm not entirely green at making CAN libraries. I use Tony's FlexCAN-T4 library on Teensy Micromod but on other chips I used my own CAN libraries. So, if this may be something I could potentially help to do I'm open to pointers as to how to get started.

1060 pins implementations checked against section 44.3 in the 1060 reference manual. See imxrt-rs/imxrt-hal#122 for a related FlexCAN driver.

dstric-aqueduct mentioned this pull request Dec 12, 2022

FlexCAN peripheral addition mciantyre/teensy4-rs#124

Open

mciantyre linked an issue Dec 12, 2022 that may be closed by this pull request

Controller Area Network (CAN) #103

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mciantyre reviewed Dec 12, 2022

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dstric-aqueduct changed the base branch from master to maint-v0.4 December 12, 2022 20:55

dstric-aqueduct added a commit to aqueductfluidics/imxrt-hal that referenced this pull request Dec 12, 2022

resolve PR Issues

68677eb

artifacts of non-existent feature: imxrt-rs#122 (comment) remove constrain function and use core::cmp::Ordering::clamp trait: imxrt-rs#122 (comment)

dstric-aqueduct added a commit to aqueductfluidics/imxrt-hal that referenced this pull request Dec 13, 2022

fix to hard code Can clock source to OSC

85fef2d

see: imxrt-rs#122 (comment)

dstric-aqueduct added a commit to aqueductfluidics/imxrt-hal that referenced this pull request Dec 13, 2022

fix to hard code Can clock source to OSC

0b53b30

see: imxrt-rs#122 (comment)

dstric-aqueduct force-pushed the dev/can branch from 283d5ec to bff2cae Compare December 14, 2022 08:14

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dstric-aqueduct added 3 commits December 19, 2022 08:21

Remove StandardId and ExtendedId structs in favor of embedded-hal

fd8e1ae

- Remove StandardId and ExtendedId structs in favor of embedded-hal - convert TryFrom to From for FlexCanMailboxCSCode

use get_clock() instead of hard code freq for baud rate calc

df48822

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PR updates

f73b2b8

- added bounds checks on StandardID and ExtendedID for creation of IdReg - improved Error descriptiveness - added docs to Frame timestamp field - Update Cargo.toml

dstric-aqueduct force-pushed the dev/can branch from 860e091 to f73b2b8 Compare December 21, 2022 12:13

remove unused import, added derives to FlexCanMailboxCSCode

228a000

dstric-aqueduct force-pushed the dev/can branch from fe29cf7 to 228a000 Compare December 24, 2022 11:29

fix to mod.rs docs

c6f055e

mciantyre reviewed Dec 27, 2022

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dstric-aqueduct added 2 commits December 28, 2022 11:53

PR updates

11daf65

- fixed clock configuration in builder method and removed set_ccm_ccg method - removed unused `instance` method - removed duplicated `set_fifo_filter` method in favor of single method that accepts a `FlexCanFilter` as arg - removed dead code

mciantyre force-pushed the dev/can branch from 11daf65 to a87433c Compare December 29, 2022 20:57

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dstric-aqueduct and others added 5 commits December 31, 2022 17:12

Merge branch 'dev/can' of https://github.com/dstric-aqueduct/imxrt-hal …

3b882b3

…into dev/can

fix clippy warnings

3350979

Fix formatting

2ca7328

We need properly-formmated code to pass CI.

Run 'cargo clippy --fix' to resolve some warnings

18ca5f9

It can't automatically fix all the issues, but the remaining fixes are straightforward.

Simplify conditional expressions with u32::from

5ad3713

Use the fact that a bool is either a zero or a one to simplify the filter value. Warned by clippy, and implemented by hand.

mciantyre reviewed Jan 2, 2023

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myCatPlaysFetch reviewed Jan 6, 2023

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update to address overflow in baud rate calc

87c27f5

See PR Issue: imxrt-rs#122 (comment)

dstric-aqueduct added a commit to aqueductfluidics/imxrt-hal that referenced this pull request Jan 11, 2023

update to address overflow in baud rate calc

3a56299

See PR Issue: imxrt-rs#122 (comment)

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