update names

Author: skc7

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

@@ -466,9 +466,9 @@ static cl::opt<bool> EnableScalarIRPasses(
   cl::Hidden);
 
 static cl::opt<bool>
-    EnableLowerSpecialLDS("amdgpu-enable-lower-special-lds",
-                          cl::desc("Enable lowering of special lds pass."),
-                          cl::init(true), cl::Hidden);
+    EnableLowerExecSync("amdgpu-enable-lower-exec-sync",
+                        cl::desc("Enable lowering of exec sync pass."),
+                        cl::init(true), cl::Hidden);
 
 static cl::opt<bool>
     EnableSwLowerLDS("amdgpu-enable-sw-lower-lds",
@@ -968,8 +968,8 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
         // We want to support the -lto-partitions=N option as "best effort".
         // For that, we need to lower LDS earlier in the pipeline before the
         // module is partitioned for codegen.
-        if (EnableLowerSpecialLDS)
-          PM.addPass(AMDGPULowerSpecialLDSPass());
+        if (EnableLowerExecSync)
+          PM.addPass(AMDGPULowerExecSyncPass());
         if (EnableSwLowerLDS)
           PM.addPass(AMDGPUSwLowerLDSPass(*this));
         if (EnableLowerModuleLDS)
@@ -1339,8 +1339,8 @@ void AMDGPUPassConfig::addIRPasses() {
   addPass(createAMDGPUExportKernelRuntimeHandlesLegacyPass());
 
   // Lower special LDS accesses.
-  if (EnableLowerSpecialLDS)
-    addPass(createAMDGPULowerSpecialLDSLegacyPass());
+  if (EnableLowerExecSync)
+    addPass(createAMDGPULowerExecSyncLegacyPass());
 
   // Lower LDS accesses to global memory pass if address sanitizer is enabled.
   if (EnableSwLowerLDS)
@@ -2087,8 +2087,8 @@ void AMDGPUCodeGenPassBuilder::addIRPasses(AddIRPass &addPass) const {
 
   addPass(AMDGPUExportKernelRuntimeHandlesPass());
 
-  if (EnableLowerSpecialLDS)
-    addPass(AMDGPULowerSpecialLDSPass());
+  if (EnableLowerExecSync)
+    addPass(AMDGPULowerExecSyncPass());
 
   if (EnableSwLowerLDS)
     addPass(AMDGPUSwLowerLDSPass(TM));

llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-module-lds.ll renamed to llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-module-lds.ll

@@ -1,9 +1,9 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 6
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-special-lds,amdgpu-lower-module-lds < %s 2>&1 | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-exec-sync,amdgpu-lower-module-lds < %s 2>&1 | FileCheck %s
 ; RUN: llc < %s -enable-new-pm -stop-after=amdgpu-lower-module-lds -mtriple=amdgcn-amd-amdhsa | FileCheck %s
 
-; Test to ensure that special LDS variables like named barriers are lowered correctly,
-; where amdgpu-lower-module-lds pass runs in pipeline after amdgpu-lower-special-lds pass.
+; Test to ensure that LDS variables like named barriers are lowered correctly,
+; where amdgpu-lower-module-lds pass runs in pipeline after amdgpu-lower-exec-sync pass.
 
 %class.ExpAmdWorkgroupWaveBarrier = type { target("amdgcn.named.barrier", 0) }
 @bar2 = internal addrspace(3) global [2 x target("amdgcn.named.barrier", 0)] poison

llvm/test/CodeGen/AMDGPU/amdgpu-lower-special-lds-and-sw-lds.ll renamed to llvm/test/CodeGen/AMDGPU/amdgpu-lower-exec-sync-and-sw-lds.ll

@@ -1,8 +1,8 @@
-; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-special-lds,amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false < %s 2>&1 | FileCheck %s
+; RUN: opt -S -mtriple=amdgcn-- -passes=amdgpu-lower-exec-sync,amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false < %s 2>&1 | FileCheck %s
 ; RUN: llc < %s -enable-new-pm -stop-after=amdgpu-sw-lower-lds -amdgpu-asan-instrument-lds=false -mtriple=amdgcn-amd-amdhsa | FileCheck %s
 
-; Test to ensure that special LDS variables like named barriers are lowered correctly in asan scenario,
-; where amdgpu-sw-lower-lds pass runs in pipeline after amdgpu-lower-special-lds pass.
+; Test to ensure that LDS variables like named barriers are lowered correctly in asan scenario,
+; where amdgpu-sw-lower-lds pass runs in pipeline after amdgpu-lower-exec-sync pass.
 %class.ExpAmdWorkgroupWaveBarrier = type { target("amdgcn.named.barrier", 0) }
 @bar2 = internal addrspace(3) global [2 x target("amdgcn.named.barrier", 0)] poison
 @bar1 = internal addrspace(3) global [4 x %class.ExpAmdWorkgroupWaveBarrier] poison