Use DAG.getNeutralElement()

Author: MacDue

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -7562,10 +7562,11 @@ SDValue AArch64TargetLowering::LowerFMUL(SDValue Op, SelectionDAG &DAG) const {
   auto FCVT = MakeGetIntrinsic(Intrinsic::aarch64_sve_fcvt_bf16f32_v2);
   auto FCVNT = MakeGetIntrinsic(Intrinsic::aarch64_sve_fcvtnt_bf16f32_v2);
 
-  SDValue Zero = DAG.getConstantFP(0.0, DL, MVT::nxv4f32);
   SDValue LHS = Op.getOperand(0);
   SDValue RHS = Op.getOperand(1);
 
+  SDValue Zero =
+      DAG.getNeutralElement(ISD::FADD, DL, MVT::nxv4f32, Op->getFlags());
   SDValue Pg =
       DAG.getConstant(1, DL, VT == MVT::nxv2bf16 ? MVT::nxv2i1 : MVT::nxv4i1);
 

llvm/test/CodeGen/AArch64/sve-bf16-arith.ll

@@ -540,7 +540,7 @@ define <vscale x 2 x bfloat> @fmul_nxv2bf16(<vscale x 2 x bfloat> %a, <vscale x
 ; NOB16B16-STREAMING-NEXT:    bfmlalb z2.s, z0.h, z1.h
 ; NOB16B16-STREAMING-NEXT:    bfcvt z0.h, p0/m, z2.s
 ; NOB16B16-STREAMING-NEXT:    ret
-  %res = fmul <vscale x 2 x bfloat> %a, %b
+  %res = fmul nsz <vscale x 2 x bfloat> %a, %b
   ret <vscale x 2 x bfloat> %res
 }
 
@@ -565,7 +565,7 @@ define <vscale x 4 x bfloat> @fmul_nxv4bf16(<vscale x 4 x bfloat> %a, <vscale x
 ; NOB16B16-STREAMING-NEXT:    bfmlalb z2.s, z0.h, z1.h
 ; NOB16B16-STREAMING-NEXT:    bfcvt z0.h, p0/m, z2.s
 ; NOB16B16-STREAMING-NEXT:    ret
-  %res = fmul <vscale x 4 x bfloat> %a, %b
+  %res = fmul nsz <vscale x 4 x bfloat> %a, %b
   ret <vscale x 4 x bfloat> %res
 }
 
@@ -596,6 +596,27 @@ define <vscale x 8 x bfloat> @fmul_nxv8bf16(<vscale x 8 x bfloat> %a, <vscale x
 ; NOB16B16-STREAMING-NEXT:    bfcvt z0.h, p0/m, z2.s
 ; NOB16B16-STREAMING-NEXT:    bfcvtnt z0.h, p0/m, z3.s
 ; NOB16B16-STREAMING-NEXT:    ret
+  %res = fmul nsz <vscale x 8 x bfloat> %a, %b
+  ret <vscale x 8 x bfloat> %res
+}
+
+define <vscale x 8 x bfloat> @fmul_nxv8bf16_no_nsz(<vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
+; NOB16B16-LABEL: fmul_nxv8bf16_no_nsz:
+; NOB16B16:       // %bb.0:
+; NOB16B16-NEXT:    mov w8, #-2147483648 // =0x80000000
+; NOB16B16-NEXT:    ptrue p0.s
+; NOB16B16-NEXT:    mov z2.s, w8
+; NOB16B16-NEXT:    mov z3.d, z2.d
+; NOB16B16-NEXT:    bfmlalb z2.s, z0.h, z1.h
+; NOB16B16-NEXT:    bfmlalt z3.s, z0.h, z1.h
+; NOB16B16-NEXT:    bfcvt z0.h, p0/m, z2.s
+; NOB16B16-NEXT:    bfcvtnt z0.h, p0/m, z3.s
+; NOB16B16-NEXT:    ret
+;
+; B16B16-LABEL: fmul_nxv8bf16_no_nsz:
+; B16B16:       // %bb.0:
+; B16B16-NEXT:    bfmul z0.h, z0.h, z1.h
+; B16B16-NEXT:    ret
   %res = fmul <vscale x 8 x bfloat> %a, %b
   ret <vscale x 8 x bfloat> %res
 }