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1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6 |
2 | 2 | ; RUN: opt -mtriple=amdgcn-amd-amdhsa -passes=load-store-vectorizer -S -o - %s | FileCheck %s |
3 | 3 |
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| 4 | +define void @onevec(ptr %ptr) { |
| 5 | +; CHECK-LABEL: define void @onevec( |
| 6 | +; CHECK-SAME: ptr [[PTR:%.*]]) { |
| 7 | +; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[PTR]], align 4 |
| 8 | +; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to <1 x i32> |
| 9 | +; CHECK-NEXT: [[GEP1:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i32 16 |
| 10 | +; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[GEP1]], align 4 |
| 11 | +; CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 [[TMP3]] to <1 x i32> |
| 12 | +; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[PTR]], i32 32 |
| 13 | +; CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[GEP2]], align 4 |
| 14 | +; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP5]] to <1 x i32> |
| 15 | +; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32 [[TMP5]] to <1 x i32> |
| 16 | +; CHECK-NEXT: ret void |
| 17 | +; |
| 18 | + %ld0 = load <1 x i32>, ptr %ptr, align 4 |
| 19 | + %ld1 = load i32, ptr %ptr, align 4 |
| 20 | + |
| 21 | + %gep1 = getelementptr inbounds i8, ptr %ptr, i32 16 |
| 22 | + %ld2 = load i32, ptr %gep1, align 4 |
| 23 | + %ld3 = load <1 x i32>, ptr %gep1, align 4 |
| 24 | + |
| 25 | + %gep2 = getelementptr inbounds i8, ptr %ptr, i32 32 |
| 26 | + %ld4 = load <1 x i32>, ptr %gep2, align 4 |
| 27 | + %ld5 = load <1 x i32>, ptr %gep2, align 4 |
| 28 | + ret void |
| 29 | +} |
| 30 | + |
4 | 31 | define void @test(ptr %ptr) { |
5 | 32 | ; CHECK-LABEL: define void @test( |
6 | 33 | ; CHECK-SAME: ptr [[PTR:%.*]]) { |
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