@@ -2322,7 +2322,7 @@ struct AMDGPUMakeDmaBaseLowering
23222322 Value c3 = createI32Constant (rewriter, loc, 3 );
23232323
23242324 Type v4i32 = this ->typeConverter ->convertType (VectorType::get (4 , i32 ));
2325- assert (v4i32);
2325+ assert (v4i32 && " expected type conversion to succeed " );
23262326 Value result = LLVM::PoisonOp::create (rewriter, loc, v4i32);
23272327 result = LLVM::InsertElementOp::create (rewriter, loc, result, c1, c0);
23282328 result = LLVM::InsertElementOp::create (rewriter, loc, result,
@@ -2370,7 +2370,7 @@ struct AMDGPUMakeDmaDescriptorLowering
23702370 Value sgpr0, ArrayRef<Value> consts) const {
23712371 // Compute data_size.
23722372 int elementTypeWidthInBits = op.getElementTypeWidth ();
2373- assert (llvm::is_contained ({8 , 16 , 32 , 64 }, elementTypeWidthInBits));
2373+ assert (llvm::is_contained ({8 , 16 , 32 , 64 }, elementTypeWidthInBits) && " expected type width to be 8, 16, 32, or 64. " );
23742374 int dataSize = llvm::Log2_32 (elementTypeWidthInBits / 8 );
23752375 return createI32Constant (rewriter, loc, dataSize << 16 );
23762376 }
@@ -2626,7 +2626,7 @@ struct AMDGPUMakeDmaDescriptorLowering
26262626
26272627 IntegerType i32 = rewriter.getI32Type ();
26282628 Type v8i32 = this ->typeConverter ->convertType (VectorType::get (8 , i32 ));
2629- assert (v8i32);
2629+ assert (v8i32 && " expected type conversion to succeed " );
26302630 Value dgroup1 = LLVM::UndefOp::create (rewriter, loc, v8i32);
26312631
26322632 for (auto [sgpr, constant] : llvm::zip_equal (sgprs, consts)) {
@@ -2651,7 +2651,7 @@ struct AMDGPUMakeDmaDescriptorLowering
26512651
26522652 IntegerType i32 = rewriter.getI32Type ();
26532653 Type v4i32 = this ->typeConverter ->convertType (VectorType::get (4 , i32 ));
2654- assert (v4i32);
2654+ assert (v4i32 && " expected type conversion to succeed " );
26552655
26562656 SmallVector<Value> consts;
26572657 for (int64_t i = 0 ; i < 8 ; i++)
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