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Merged
merged 1 commit into from
Sep 5, 2025
Merged

[NFC][PowerPC] adding the options for register names and VSR to VR #157007

merged 1 commit into from
Sep 5, 2025

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Himadhith
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@Himadhith Himadhith commented Sep 5, 2025 •
edited by tonykuttai
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NFC patch to add the flags -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr to the following test files

llvm/test/CodeGen/PowerPC/recipest.ll
llvm/test/CodeGen/PowerPC/setcc-logic.ll
llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll

Created this PR based on this discussion: #151971 (comment)

@llvmbot
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llvmbot commented Sep 5, 2025

@llvm/pr-subscribers-backend-powerpc

Author: None (Himadhith)

Changes

…pc-asm-full-reg-names -ppc-vsr-nums-as-vr)

NFC patch to add the flags -ppc-asm-full-reg-names --ppc-vsr-nums-as-vr to the following test files

llvm/test/CodeGen/PowerPC/recipest.ll
llvm/test/CodeGen/PowerPC/setcc-logic.ll
llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll

Created this PR based on this discussion: #151971 (comment)

Patch is 1.65 MiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/157007.diff

3 Files Affected:

  • (modified) llvm/test/CodeGen/PowerPC/recipest.ll (+725-722)
  • (modified) llvm/test/CodeGen/PowerPC/setcc-logic.ll (+123-122)
  • (modified) llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll (+22442-22438)
diff --git a/llvm/test/CodeGen/PowerPC/recipest.ll b/llvm/test/CodeGen/PowerPC/recipest.ll
index 2598a410b8761..4bf572bb02942 100644
--- a/llvm/test/CodeGen/PowerPC/recipest.ll
+++ b/llvm/test/CodeGen/PowerPC/recipest.ll
@@ -1,7 +1,10 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck --check-prefix=CHECK-P7 %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 | FileCheck --check-prefix=CHECK-P8 %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 | FileCheck --check-prefix=CHECK-P9 %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx \
+; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P7 %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 \
+; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P8 %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \
+; RUN:   -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P9 %s
 
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 
@@ -14,58 +17,58 @@ declare <2 x double> @llvm.sqrt.v2f64(<2 x double>)
 define double @foo_fmf(double %a, double %b) nounwind {
 ; CHECK-P7-LABEL: foo_fmf:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqrte 0, 2
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P7-NEXT:    lfs 4, .LCPI0_0@toc@l(3)
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI0_1@toc@ha
-; CHECK-P7-NEXT:    lfs 5, .LCPI0_1@toc@l(3)
-; CHECK-P7-NEXT:    fmul 3, 2, 0
-; CHECK-P7-NEXT:    fmadd 3, 3, 0, 4
-; CHECK-P7-NEXT:    fmul 0, 0, 5
-; CHECK-P7-NEXT:    fmul 0, 0, 3
-; CHECK-P7-NEXT:    fmul 2, 2, 0
-; CHECK-P7-NEXT:    fmadd 2, 2, 0, 4
-; CHECK-P7-NEXT:    fmul 0, 0, 5
-; CHECK-P7-NEXT:    fmul 0, 0, 2
-; CHECK-P7-NEXT:    fmul 1, 1, 0
+; CHECK-P7-NEXT:    frsqrte f0, f2
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
+; CHECK-P7-NEXT:    lfs f4, .LCPI0_0@toc@l(r3)
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI0_1@toc@ha
+; CHECK-P7-NEXT:    lfs f5, .LCPI0_1@toc@l(r3)
+; CHECK-P7-NEXT:    fmul f3, f2, f0
+; CHECK-P7-NEXT:    fmadd f3, f3, f0, f4
+; CHECK-P7-NEXT:    fmul f0, f0, f5
+; CHECK-P7-NEXT:    fmul f0, f0, f3
+; CHECK-P7-NEXT:    fmul f2, f2, f0
+; CHECK-P7-NEXT:    fmadd f2, f2, f0, f4
+; CHECK-P7-NEXT:    fmul f0, f0, f5
+; CHECK-P7-NEXT:    fmul f0, f0, f2
+; CHECK-P7-NEXT:    fmul f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: foo_fmf:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    vspltisw 2, -3
-; CHECK-P8-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P8-NEXT:    xvcvsxwdp 4, 34
-; CHECK-P8-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P8-NEXT:    fmr 5, 4
-; CHECK-P8-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P8-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P8-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
-; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P8-NEXT:    vspltisw v2, -3
+; CHECK-P8-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P8-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
+; CHECK-P8-NEXT:    xvcvsxwdp vs4, v2
+; CHECK-P8-NEXT:    xsmuldp f3, f2, f0
+; CHECK-P8-NEXT:    fmr f5, f4
+; CHECK-P8-NEXT:    xsmaddadp f5, f3, f0
+; CHECK-P8-NEXT:    lfs f3, .LCPI0_0@toc@l(r3)
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f5
+; CHECK-P8-NEXT:    xsmuldp f2, f2, f0
+; CHECK-P8-NEXT:    xsmaddadp f4, f2, f0
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f4
+; CHECK-P8-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foo_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P9-NEXT:    vspltisw 2, -3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
-; CHECK-P9-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P9-NEXT:    xvcvsxwdp 4, 34
-; CHECK-P9-NEXT:    fmr 5, 4
-; CHECK-P9-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P9-NEXT:    lfs 3, .LCPI0_0@toc@l(3)
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P9-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P9-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 4
-; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P9-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P9-NEXT:    vspltisw v2, -3
+; CHECK-P9-NEXT:    addis r3, r2, .LCPI0_0@toc@ha
+; CHECK-P9-NEXT:    xsmuldp f3, f2, f0
+; CHECK-P9-NEXT:    xvcvsxwdp vs4, v2
+; CHECK-P9-NEXT:    fmr f5, f4
+; CHECK-P9-NEXT:    xsmaddadp f5, f3, f0
+; CHECK-P9-NEXT:    lfs f3, .LCPI0_0@toc@l(r3)
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f5
+; CHECK-P9-NEXT:    xsmuldp f2, f2, f0
+; CHECK-P9-NEXT:    xsmaddadp f4, f2, f0
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f4
+; CHECK-P9-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call arcp contract reassoc double @llvm.sqrt.f64(double %b)
   %r = fdiv arcp contract reassoc double %a, %x
@@ -75,20 +78,20 @@ define double @foo_fmf(double %a, double %b) nounwind {
 define double @foo_safe(double %a, double %b) nounwind {
 ; CHECK-P7-LABEL: foo_safe:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    fsqrt 0, 2
-; CHECK-P7-NEXT:    fdiv 1, 1, 0
+; CHECK-P7-NEXT:    fsqrt f0, f2
+; CHECK-P7-NEXT:    fdiv f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: foo_safe:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xssqrtdp 0, 2
-; CHECK-P8-NEXT:    xsdivdp 1, 1, 0
+; CHECK-P8-NEXT:    xssqrtdp f0, f2
+; CHECK-P8-NEXT:    xsdivdp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foo_safe:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xssqrtdp 0, 2
-; CHECK-P9-NEXT:    xsdivdp 1, 1, 0
+; CHECK-P9-NEXT:    xssqrtdp f0, f2
+; CHECK-P9-NEXT:    xsdivdp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call double @llvm.sqrt.f64(double %b)
   %r = fdiv double %a, %x
@@ -98,20 +101,20 @@ define double @foo_safe(double %a, double %b) nounwind {
 define double @no_estimate_refinement_f64(double %a, double %b) #0 {
 ; CHECK-P7-LABEL: no_estimate_refinement_f64:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqrte 0, 2
-; CHECK-P7-NEXT:    fmul 1, 1, 0
+; CHECK-P7-NEXT:    frsqrte f0, f2
+; CHECK-P7-NEXT:    fmul f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: no_estimate_refinement_f64:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P8-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P8-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: no_estimate_refinement_f64:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P9-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P9-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call arcp reassoc double @llvm.sqrt.f64(double %b)
   %r = fdiv arcp reassoc double %a, %x
@@ -121,44 +124,44 @@ define double @no_estimate_refinement_f64(double %a, double %b) #0 {
 define double @foof_fmf(double %a, float %b) nounwind {
 ; CHECK-P7-LABEL: foof_fmf:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqrtes 0, 2
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-P7-NEXT:    lfs 3, .LCPI3_0@toc@l(3)
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
-; CHECK-P7-NEXT:    fmuls 2, 2, 0
-; CHECK-P7-NEXT:    fmadds 2, 2, 0, 3
-; CHECK-P7-NEXT:    lfs 3, .LCPI3_1@toc@l(3)
-; CHECK-P7-NEXT:    fmuls 0, 0, 3
-; CHECK-P7-NEXT:    fmuls 0, 0, 2
-; CHECK-P7-NEXT:    fmul 1, 1, 0
+; CHECK-P7-NEXT:    frsqrtes f0, f2
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
+; CHECK-P7-NEXT:    lfs f3, .LCPI3_0@toc@l(r3)
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI3_1@toc@ha
+; CHECK-P7-NEXT:    fmuls f2, f2, f0
+; CHECK-P7-NEXT:    fmadds f2, f2, f0, f3
+; CHECK-P7-NEXT:    lfs f3, .LCPI3_1@toc@l(r3)
+; CHECK-P7-NEXT:    fmuls f0, f0, f3
+; CHECK-P7-NEXT:    fmuls f0, f0, f2
+; CHECK-P7-NEXT:    fmul f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: foof_fmf:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P8-NEXT:    vspltisw 2, -3
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-P8-NEXT:    xvcvsxwdp 3, 34
-; CHECK-P8-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT:    lfs 2, .LCPI3_0@toc@l(3)
-; CHECK-P8-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P8-NEXT:    xsmulsp 0, 0, 3
-; CHECK-P8-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P8-NEXT:    xsrsqrtesp f0, f2
+; CHECK-P8-NEXT:    vspltisw v2, -3
+; CHECK-P8-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
+; CHECK-P8-NEXT:    xvcvsxwdp vs3, v2
+; CHECK-P8-NEXT:    xsmulsp f2, f2, f0
+; CHECK-P8-NEXT:    xsmaddasp f3, f2, f0
+; CHECK-P8-NEXT:    lfs f2, .LCPI3_0@toc@l(r3)
+; CHECK-P8-NEXT:    xsmulsp f0, f0, f2
+; CHECK-P8-NEXT:    xsmulsp f0, f0, f3
+; CHECK-P8-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foof_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P9-NEXT:    vspltisw 2, -3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; CHECK-P9-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P9-NEXT:    xvcvsxwdp 3, 34
-; CHECK-P9-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI3_0@toc@l(3)
-; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P9-NEXT:    xsmulsp 0, 0, 3
-; CHECK-P9-NEXT:    xsmuldp 1, 1, 0
+; CHECK-P9-NEXT:    xsrsqrtesp f0, f2
+; CHECK-P9-NEXT:    vspltisw v2, -3
+; CHECK-P9-NEXT:    addis r3, r2, .LCPI3_0@toc@ha
+; CHECK-P9-NEXT:    xsmulsp f2, f2, f0
+; CHECK-P9-NEXT:    xvcvsxwdp vs3, v2
+; CHECK-P9-NEXT:    xsmaddasp f3, f2, f0
+; CHECK-P9-NEXT:    lfs f2, .LCPI3_0@toc@l(r3)
+; CHECK-P9-NEXT:    xsmulsp f0, f0, f2
+; CHECK-P9-NEXT:    xsmulsp f0, f0, f3
+; CHECK-P9-NEXT:    xsmuldp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b)
   %y = fpext float %x to double
@@ -169,20 +172,20 @@ define double @foof_fmf(double %a, float %b) nounwind {
 define double @foof_safe(double %a, float %b) nounwind {
 ; CHECK-P7-LABEL: foof_safe:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    fsqrts 0, 2
-; CHECK-P7-NEXT:    fdiv 1, 1, 0
+; CHECK-P7-NEXT:    fsqrts f0, f2
+; CHECK-P7-NEXT:    fdiv f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: foof_safe:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xssqrtsp 0, 2
-; CHECK-P8-NEXT:    xsdivdp 1, 1, 0
+; CHECK-P8-NEXT:    xssqrtsp f0, f2
+; CHECK-P8-NEXT:    xsdivdp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: foof_safe:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xssqrtsp 0, 2
-; CHECK-P9-NEXT:    xsdivdp 1, 1, 0
+; CHECK-P9-NEXT:    xssqrtsp f0, f2
+; CHECK-P9-NEXT:    xsdivdp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call float @llvm.sqrt.f32(float %b)
   %y = fpext float %x to double
@@ -193,61 +196,61 @@ define double @foof_safe(double %a, float %b) nounwind {
 define float @food_fmf(float %a, double %b) nounwind {
 ; CHECK-P7-LABEL: food_fmf:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqrte 0, 2
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; CHECK-P7-NEXT:    lfs 4, .LCPI5_0@toc@l(3)
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; CHECK-P7-NEXT:    lfs 5, .LCPI5_1@toc@l(3)
-; CHECK-P7-NEXT:    fmul 3, 2, 0
-; CHECK-P7-NEXT:    fmadd 3, 3, 0, 4
-; CHECK-P7-NEXT:    fmul 0, 0, 5
-; CHECK-P7-NEXT:    fmul 0, 0, 3
-; CHECK-P7-NEXT:    fmul 2, 2, 0
-; CHECK-P7-NEXT:    fmadd 2, 2, 0, 4
-; CHECK-P7-NEXT:    fmul 0, 0, 5
-; CHECK-P7-NEXT:    fmul 0, 0, 2
-; CHECK-P7-NEXT:    frsp 0, 0
-; CHECK-P7-NEXT:    fmuls 1, 1, 0
+; CHECK-P7-NEXT:    frsqrte f0, f2
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
+; CHECK-P7-NEXT:    lfs f4, .LCPI5_0@toc@l(r3)
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI5_1@toc@ha
+; CHECK-P7-NEXT:    lfs f5, .LCPI5_1@toc@l(r3)
+; CHECK-P7-NEXT:    fmul f3, f2, f0
+; CHECK-P7-NEXT:    fmadd f3, f3, f0, f4
+; CHECK-P7-NEXT:    fmul f0, f0, f5
+; CHECK-P7-NEXT:    fmul f0, f0, f3
+; CHECK-P7-NEXT:    fmul f2, f2, f0
+; CHECK-P7-NEXT:    fmadd f2, f2, f0, f4
+; CHECK-P7-NEXT:    fmul f0, f0, f5
+; CHECK-P7-NEXT:    fmul f0, f0, f2
+; CHECK-P7-NEXT:    frsp f0, f0
+; CHECK-P7-NEXT:    fmuls f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: food_fmf:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    vspltisw 2, -3
-; CHECK-P8-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; CHECK-P8-NEXT:    xvcvsxwdp 4, 34
-; CHECK-P8-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P8-NEXT:    fmr 5, 4
-; CHECK-P8-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P8-NEXT:    lfs 3, .LCPI5_0@toc@l(3)
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P8-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P8-NEXT:    xsmuldp 0, 0, 4
-; CHECK-P8-NEXT:    xsrsp 0, 0
-; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
+; CHECK-P8-NEXT:    vspltisw v2, -3
+; CHECK-P8-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P8-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
+; CHECK-P8-NEXT:    xvcvsxwdp vs4, v2
+; CHECK-P8-NEXT:    xsmuldp f3, f2, f0
+; CHECK-P8-NEXT:    fmr f5, f4
+; CHECK-P8-NEXT:    xsmaddadp f5, f3, f0
+; CHECK-P8-NEXT:    lfs f3, .LCPI5_0@toc@l(r3)
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f5
+; CHECK-P8-NEXT:    xsmuldp f2, f2, f0
+; CHECK-P8-NEXT:    xsmaddadp f4, f2, f0
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P8-NEXT:    xsmuldp f0, f0, f4
+; CHECK-P8-NEXT:    xsrsp f0, f0
+; CHECK-P8-NEXT:    xsmulsp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: food_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xsrsqrtedp 0, 2
-; CHECK-P9-NEXT:    vspltisw 2, -3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; CHECK-P9-NEXT:    xsmuldp 3, 2, 0
-; CHECK-P9-NEXT:    xvcvsxwdp 4, 34
-; CHECK-P9-NEXT:    fmr 5, 4
-; CHECK-P9-NEXT:    xsmaddadp 5, 3, 0
-; CHECK-P9-NEXT:    lfs 3, .LCPI5_0@toc@l(3)
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 5
-; CHECK-P9-NEXT:    xsmuldp 2, 2, 0
-; CHECK-P9-NEXT:    xsmaddadp 4, 2, 0
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 3
-; CHECK-P9-NEXT:    xsmuldp 0, 0, 4
-; CHECK-P9-NEXT:    xsrsp 0, 0
-; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
+; CHECK-P9-NEXT:    xsrsqrtedp f0, f2
+; CHECK-P9-NEXT:    vspltisw v2, -3
+; CHECK-P9-NEXT:    addis r3, r2, .LCPI5_0@toc@ha
+; CHECK-P9-NEXT:    xsmuldp f3, f2, f0
+; CHECK-P9-NEXT:    xvcvsxwdp vs4, v2
+; CHECK-P9-NEXT:    fmr f5, f4
+; CHECK-P9-NEXT:    xsmaddadp f5, f3, f0
+; CHECK-P9-NEXT:    lfs f3, .LCPI5_0@toc@l(r3)
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f5
+; CHECK-P9-NEXT:    xsmuldp f2, f2, f0
+; CHECK-P9-NEXT:    xsmaddadp f4, f2, f0
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f3
+; CHECK-P9-NEXT:    xsmuldp f0, f0, f4
+; CHECK-P9-NEXT:    xsrsp f0, f0
+; CHECK-P9-NEXT:    xsmulsp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call contract reassoc arcp double @llvm.sqrt.f64(double %b)
   %y = fptrunc double %x to float
@@ -258,23 +261,23 @@ define float @food_fmf(float %a, double %b) nounwind {
 define float @food_safe(float %a, double %b) nounwind {
 ; CHECK-P7-LABEL: food_safe:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    fsqrt 0, 2
-; CHECK-P7-NEXT:    frsp 0, 0
-; CHECK-P7-NEXT:    fdivs 1, 1, 0
+; CHECK-P7-NEXT:    fsqrt f0, f2
+; CHECK-P7-NEXT:    frsp f0, f0
+; CHECK-P7-NEXT:    fdivs f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: food_safe:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xssqrtdp 0, 2
-; CHECK-P8-NEXT:    xsrsp 0, 0
-; CHECK-P8-NEXT:    xsdivsp 1, 1, 0
+; CHECK-P8-NEXT:    xssqrtdp f0, f2
+; CHECK-P8-NEXT:    xsrsp f0, f0
+; CHECK-P8-NEXT:    xsdivsp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: food_safe:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xssqrtdp 0, 2
-; CHECK-P9-NEXT:    xsrsp 0, 0
-; CHECK-P9-NEXT:    xsdivsp 1, 1, 0
+; CHECK-P9-NEXT:    xssqrtdp f0, f2
+; CHECK-P9-NEXT:    xsrsp f0, f0
+; CHECK-P9-NEXT:    xsdivsp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call double @llvm.sqrt.f64(double %b)
   %y = fptrunc double %x to float
@@ -285,44 +288,44 @@ define float @food_safe(float %a, double %b) nounwind {
 define float @goo_fmf(float %a, float %b) nounwind {
 ; CHECK-P7-LABEL: goo_fmf:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqrtes 0, 2
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; CHECK-P7-NEXT:    lfs 3, .LCPI7_0@toc@l(3)
-; CHECK-P7-NEXT:    addis 3, 2, .LCPI7_1@toc@ha
-; CHECK-P7-NEXT:    fmuls 2, 2, 0
-; CHECK-P7-NEXT:    fmadds 2, 2, 0, 3
-; CHECK-P7-NEXT:    lfs 3, .LCPI7_1@toc@l(3)
-; CHECK-P7-NEXT:    fmuls 0, 0, 3
-; CHECK-P7-NEXT:    fmuls 0, 0, 2
-; CHECK-P7-NEXT:    fmuls 1, 1, 0
+; CHECK-P7-NEXT:    frsqrtes f0, f2
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
+; CHECK-P7-NEXT:    lfs f3, .LCPI7_0@toc@l(r3)
+; CHECK-P7-NEXT:    addis r3, r2, .LCPI7_1@toc@ha
+; CHECK-P7-NEXT:    fmuls f2, f2, f0
+; CHECK-P7-NEXT:    fmadds f2, f2, f0, f3
+; CHECK-P7-NEXT:    lfs f3, .LCPI7_1@toc@l(r3)
+; CHECK-P7-NEXT:    fmuls f0, f0, f3
+; CHECK-P7-NEXT:    fmuls f0, f0, f2
+; CHECK-P7-NEXT:    fmuls f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: goo_fmf:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P8-NEXT:    vspltisw 2, -3
-; CHECK-P8-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; CHECK-P8-NEXT:    xvcvsxwdp 3, 34
-; CHECK-P8-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P8-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P8-NEXT:    lfs 2, .LCPI7_0@toc@l(3)
-; CHECK-P8-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P8-NEXT:    xsmulsp 0, 0, 3
-; CHECK-P8-NEXT:    xsmulsp 1, 1, 0
+; CHECK-P8-NEXT:    xsrsqrtesp f0, f2
+; CHECK-P8-NEXT:    vspltisw v2, -3
+; CHECK-P8-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
+; CHECK-P8-NEXT:    xvcvsxwdp vs3, v2
+; CHECK-P8-NEXT:    xsmulsp f2, f2, f0
+; CHECK-P8-NEXT:    xsmaddasp f3, f2, f0
+; CHECK-P8-NEXT:    lfs f2, .LCPI7_0@toc@l(r3)
+; CHECK-P8-NEXT:    xsmulsp f0, f0, f2
+; CHECK-P8-NEXT:    xsmulsp f0, f0, f3
+; CHECK-P8-NEXT:    xsmulsp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: goo_fmf:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xsrsqrtesp 0, 2
-; CHECK-P9-NEXT:    vspltisw 2, -3
-; CHECK-P9-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; CHECK-P9-NEXT:    xsmulsp 2, 2, 0
-; CHECK-P9-NEXT:    xvcvsxwdp 3, 34
-; CHECK-P9-NEXT:    xsmaddasp 3, 2, 0
-; CHECK-P9-NEXT:    lfs 2, .LCPI7_0@toc@l(3)
-; CHECK-P9-NEXT:    xsmulsp 0, 0, 2
-; CHECK-P9-NEXT:    xsmulsp 0, 0, 3
-; CHECK-P9-NEXT:    xsmulsp 1, 1, 0
+; CHECK-P9-NEXT:    xsrsqrtesp f0, f2
+; CHECK-P9-NEXT:    vspltisw v2, -3
+; CHECK-P9-NEXT:    addis r3, r2, .LCPI7_0@toc@ha
+; CHECK-P9-NEXT:    xsmulsp f2, f2, f0
+; CHECK-P9-NEXT:    xvcvsxwdp vs3, v2
+; CHECK-P9-NEXT:    xsmaddasp f3, f2, f0
+; CHECK-P9-NEXT:    lfs f2, .LCPI7_0@toc@l(r3)
+; CHECK-P9-NEXT:    xsmulsp f0, f0, f2
+; CHECK-P9-NEXT:    xsmulsp f0, f0, f3
+; CHECK-P9-NEXT:    xsmulsp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b)
   %r = fdiv contract reassoc arcp float %a, %x
@@ -332,20 +335,20 @@ define float @goo_fmf(float %a, float %b) nounwind {
 define float @goo_safe(float %a, float %b) nounwind {
 ; CHECK-P7-LABEL: goo_safe:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    fsqrts 0, 2
-; CHECK-P7-NEXT:    fdivs 1, 1, 0
+; CHECK-P7-NEXT:    fsqrts f0, f2
+; CHECK-P7-NEXT:    fdivs f1, f1, f0
 ; CHECK-P7-NEXT:    blr
 ;
 ; CHECK-P8-LABEL: goo_safe:
 ; CHECK-P8:       # %bb.0:
-; CHECK-P8-NEXT:    xssqrtsp 0, 2
-; CHECK-P8-NEXT:    xsdivsp 1, 1, 0
+; CHECK-P8-NEXT:    xssqrtsp f0, f2
+; CHECK-P8-NEXT:    xsdivsp f1, f1, f0
 ; CHECK-P8-NEXT:    blr
 ;
 ; CHECK-P9-LABEL: goo_safe:
 ; CHECK-P9:       # %bb.0:
-; CHECK-P9-NEXT:    xssqrtsp 0, 2
-; CHECK-P9-NEXT:    xsdivsp 1, 1, 0
+; CHECK-P9-NEXT:    xssqrtsp f0, f2
+; CHECK-P9-NEXT:    xsdivsp f1, f1, f0
 ; CHECK-P9-NEXT:    blr
   %x = call float @llvm.sqrt.f32(float %b)
   %r = fdiv float %a, %x
@@ -355,20 +358,20 @@ define float @goo_safe(float %a, float %b) nounwind {
 define float @no_estimate_refinement_f32(float %a, float %b) #0 {
 ; CHECK-P7-LABEL: no_estimate_refinement_f32:
 ; CHECK-P7:       # %bb.0:
-; CHECK-P7-NEXT:    frsqr...
[truncated]

[NFC][PowerPC] adding the options for register names and VSR to VR(-p…
c1481ca 
…pc-asm-full-reg-names -ppc-vsr-nums-as-vr)
@tonykuttai tonykuttai self-requested a review September 5, 2025 04:53
@tonykuttai tonykuttai changed the title [NFC][PowerPC] adding the options for register names and VSR to VR(-p… [NFC][PowerPC] adding the options for register names and VSR to VR Sep 5, 2025
tonykuttai
tonykuttai approved these changes Sep 5, 2025
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LGTM

@tonykuttai tonykuttai merged commit ffbd616 into llvm:main Sep 5, 2025
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@Himadhith Himadhith mentioned this pull request Sep 5, 2025
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@Himadhith @llvmbot @tonykuttai