Skip to content
Merged
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
14 changes: 12 additions & 2 deletions llvm/lib/Target/Mips/MipsSubtarget.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -245,10 +245,20 @@ CodeGenOptLevel MipsSubtarget::getOptLevelToEnablePostRAScheduler() const {
MipsSubtarget &
MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
const TargetMachine &TM) {
StringRef CPUName = MIPS_MC::selectMipsCPU(TM.getTargetTriple(), CPU);
const Triple &TT = TM.getTargetTriple();
StringRef CPUName = MIPS_MC::selectMipsCPU(TT, CPU);

std::string FullFS;
if (getABI().ArePtrs64bit()) {
FullFS = "+ptr64";
if (!FS.empty())
FullFS = (Twine(FullFS) + "," + FS).str();
} else {
FullFS = FS.str();
}

// Parse features string.
ParseSubtargetFeatures(CPUName, /*TuneCPU*/ CPUName, FS);
ParseSubtargetFeatures(CPUName, /*TuneCPU=*/CPUName, FullFS);
// Initialize scheduling itinerary for the specified CPU.
InstrItins = getInstrItineraryForCPU(CPUName);

Expand Down