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Sep 26, 2025
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[RISCV][test] Add additional check-prefixes to fix conflicts in tests #160689

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fe843e5
[RISCV][test] Add additional check-prefixes to fix conflicts in tests
asb Sep 25, 2025
60b9a09
Proper fix for float-intrinsics.ll
asb Sep 25, 2025
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377 changes: 376 additions & 1 deletion llvm/test/CodeGen/RISCV/GlobalISel/float-intrinsics.ll
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112 changes: 110 additions & 2 deletions llvm/test/CodeGen/RISCV/cmov-branch-opt.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -6,9 +6,9 @@
; RUN: llc -mtriple=riscv64 -mattr=+conditional-cmv-fusion,+c,+zicond -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=CMOV,CMOV-ZICOND %s
; RUN: llc -mtriple=riscv64 -mattr=+short-forward-branch-opt -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=SHORT_FORWARD,SFB-NOZICOND %s
; RUN: | FileCheck -check-prefixes=SHORT_FORWARD,SFB-NOZICOND,SFB-NOZICOND-NOC %s
; RUN: llc -mtriple=riscv64 -mattr=+short-forward-branch-opt,+c -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=SHORT_FORWARD,SFB-NOZICOND %s
; RUN: | FileCheck -check-prefixes=SHORT_FORWARD,SFB-NOZICOND,SFB-NOZICOND-C %s
; RUN: llc -mtriple=riscv64 -mattr=+short-forward-branch-opt,+zicond -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefixes=SHORT_FORWARD,SFB-ZICOND %s

Expand Down Expand Up @@ -263,6 +263,24 @@ define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) {
; CMOV-NEXT: .LBB6_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_xor_2:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB6_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: xor a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB6_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_xor_2:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB6_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: xor a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB6_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_xor_2:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down Expand Up @@ -300,6 +318,24 @@ define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) {
; CMOV-NEXT: .LBB7_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_xor_2b:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB7_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: xor a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB7_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_xor_2b:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB7_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: xor a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB7_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_xor_2b:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down Expand Up @@ -335,6 +371,24 @@ define i32 @select_or(i32 %A, i32 %B, i8 %cond) {
; CMOV-NEXT: .LBB8_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_or:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB8_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: or a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB8_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_or:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB8_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: or a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB8_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_or:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down Expand Up @@ -372,6 +426,24 @@ define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) {
; CMOV-NEXT: .LBB9_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_or_b:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB9_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: or a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB9_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_or_b:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB9_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: or a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB9_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_or_b:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down Expand Up @@ -407,6 +479,24 @@ define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) {
; CMOV-NEXT: .LBB10_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_or_1:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB10_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: or a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB10_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_or_1:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB10_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: or a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB10_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_or_1:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down Expand Up @@ -444,6 +534,24 @@ define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) {
; CMOV-NEXT: .LBB11_2: # %entry
; CMOV-NEXT: ret
;
; SFB-NOZICOND-NOC-LABEL: select_or_1b:
; SFB-NOZICOND-NOC: # %bb.0: # %entry
; SFB-NOZICOND-NOC-NEXT: andi a2, a2, 1
; SFB-NOZICOND-NOC-NEXT: beqz a2, .LBB11_2
; SFB-NOZICOND-NOC-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-NOC-NEXT: or a0, a1, a0
; SFB-NOZICOND-NOC-NEXT: .LBB11_2: # %entry
; SFB-NOZICOND-NOC-NEXT: ret
;
; SFB-NOZICOND-C-LABEL: select_or_1b:
; SFB-NOZICOND-C: # %bb.0: # %entry
; SFB-NOZICOND-C-NEXT: andi a2, a2, 1
; SFB-NOZICOND-C-NEXT: beqz a2, .LBB11_2
; SFB-NOZICOND-C-NEXT: # %bb.1: # %entry
; SFB-NOZICOND-C-NEXT: or a0, a0, a1
; SFB-NOZICOND-C-NEXT: .LBB11_2: # %entry
; SFB-NOZICOND-C-NEXT: ret
;
; SFB-ZICOND-LABEL: select_or_1b:
; SFB-ZICOND: # %bb.0: # %entry
; SFB-ZICOND-NEXT: andi a2, a2, 1
Expand Down
37 changes: 35 additions & 2 deletions llvm/test/CodeGen/RISCV/double-select-fcmp.ll
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Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
; RUN: -target-abi=ilp32d | FileCheck %s
; RUN: -target-abi=ilp32d | FileCheck --check-prefixes=CHECK,RV32D %s
; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
; RUN: -target-abi=lp64d | FileCheck %s
; RUN: -target-abi=lp64d | FileCheck --check-prefixes=CHECK,RV64D %s
; RUN: llc -mtriple=riscv32 -mattr=+zdinx -verify-machineinstrs < %s \
; RUN: -target-abi=ilp32 | FileCheck --check-prefix=CHECKRV32ZDINX %s
; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s \
Expand Down Expand Up @@ -640,6 +640,39 @@ define signext i32 @select_fcmp_uge_1_2(double %a, double %b) nounwind {
}

define double @CascadedSelect(double noundef %a) {
; RV32D-LABEL: CascadedSelect:
; RV32D: # %bb.0: # %entry
; RV32D-NEXT: lui a0, %hi(.LCPI20_0)
; RV32D-NEXT: fld fa5, %lo(.LCPI20_0)(a0)
; RV32D-NEXT: flt.d a0, fa5, fa0
; RV32D-NEXT: bnez a0, .LBB20_3
; RV32D-NEXT: # %bb.1: # %entry
; RV32D-NEXT: fcvt.d.w fa5, zero
; RV32D-NEXT: flt.d a0, fa0, fa5
; RV32D-NEXT: bnez a0, .LBB20_3
; RV32D-NEXT: # %bb.2: # %entry
; RV32D-NEXT: fmv.d fa5, fa0
; RV32D-NEXT: .LBB20_3: # %entry
; RV32D-NEXT: fmv.d fa0, fa5
; RV32D-NEXT: ret
;
; RV64D-LABEL: CascadedSelect:
; RV64D: # %bb.0: # %entry
; RV64D-NEXT: li a0, 1023
; RV64D-NEXT: slli a0, a0, 52
; RV64D-NEXT: fmv.d.x fa5, a0
; RV64D-NEXT: flt.d a0, fa5, fa0
; RV64D-NEXT: bnez a0, .LBB20_3
; RV64D-NEXT: # %bb.1: # %entry
; RV64D-NEXT: fmv.d.x fa5, zero
; RV64D-NEXT: flt.d a0, fa0, fa5
; RV64D-NEXT: bnez a0, .LBB20_3
; RV64D-NEXT: # %bb.2: # %entry
; RV64D-NEXT: fmv.d fa5, fa0
; RV64D-NEXT: .LBB20_3: # %entry
; RV64D-NEXT: fmv.d fa0, fa5
; RV64D-NEXT: ret
;
; CHECKRV32ZDINX-LABEL: CascadedSelect:
; CHECKRV32ZDINX: # %bb.0: # %entry
; CHECKRV32ZDINX-NEXT: lui a3, %hi(.LCPI20_0)
Expand Down
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