[DAG] Add ComputeNumSignBits(FREEZE(X)) handling #161507
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If X is known never under/poison then skip the freeze and return ComputeNumSignBits(X)
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@llvm/pr-subscribers-llvm-selectiondag @llvm/pr-subscribers-backend-aarch64 Author: Simon Pilgrim (RKSimon) ChangesIf X is known never under/poison then skip the freeze and return ComputeNumSignBits(X) Full diff: https://github.com/llvm/llvm-project/pull/161507.diff 2 Files Affected:
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 8fc7eabf90ea8..95f53fe0bfdba 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -4762,6 +4762,11 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
case ISD::AssertZext:
Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
return VTBits-Tmp;
+ case ISD::FREEZE:
+ if (isGuaranteedNotToBeUndefOrPoison(Op.getOperand(0), DemandedElts,
+ /*PoisonOnly=*/false))
+ return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
+ break;
case ISD::MERGE_VALUES:
return ComputeNumSignBits(Op.getOperand(Op.getResNo()), DemandedElts,
Depth + 1);
diff --git a/llvm/test/CodeGen/AArch64/freeze.ll b/llvm/test/CodeGen/AArch64/freeze.ll
index fae3bbe2dcfba..fb909fec90434 100644
--- a/llvm/test/CodeGen/AArch64/freeze.ll
+++ b/llvm/test/CodeGen/AArch64/freeze.ll
@@ -466,15 +466,12 @@ define <8 x i16> @freeze_urhadd(<8 x i16> %a0, <8 x i16> %a1) {
ret <8 x i16> %masked
}
-; TODO: Unnecessary sext_inreg
define <8 x i16> @freeze_shadd(<8 x i8> %a0, <8 x i16> %a1) {
; CHECK-LABEL: freeze_shadd:
; CHECK: // %bb.0:
; CHECK-NEXT: sshll v0.8h, v0.8b, #0
; CHECK-NEXT: sshr v1.8h, v1.8h, #8
; CHECK-NEXT: shadd v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: shl v0.8h, v0.8h, #8
-; CHECK-NEXT: sshr v0.8h, v0.8h, #8
; CHECK-NEXT: ret
%x0 = sext <8 x i8> %a0 to <8 x i16>
%x1 = ashr <8 x i16> %a1, splat (i16 8)
@@ -485,15 +482,12 @@ define <8 x i16> @freeze_shadd(<8 x i8> %a0, <8 x i16> %a1) {
ret <8 x i16> %sext
}
-; TODO: Unnecessary sext_inreg
define <8 x i16> @freeze_srhadd(<8 x i8> %a0, <8 x i16> %a1) {
; CHECK-LABEL: freeze_srhadd:
; CHECK: // %bb.0:
; CHECK-NEXT: sshll v0.8h, v0.8b, #0
; CHECK-NEXT: sshr v1.8h, v1.8h, #8
; CHECK-NEXT: srhadd v0.8h, v0.8h, v1.8h
-; CHECK-NEXT: shl v0.8h, v0.8h, #8
-; CHECK-NEXT: sshr v0.8h, v0.8h, #8
; CHECK-NEXT: ret
%x0 = sext <8 x i8> %a0 to <8 x i16>
%x1 = ashr <8 x i16> %a1, splat (i16 8)
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I think it is a bit unclear why this is needed. If the operand is known not to be undef/poison, then I would assume that the freeze is removed. So is it some kind of internal phase order at isel, or are we keeping freeze for some reason? |
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Its the DemandedElts mask in particular which makes this useful - we can confirm that the specific elements we care about for analysis are not undef/poison, even if other elements are (e.g. due to vector widening, shuffles etc.) which prevents the removal of the freeze entirely. Another reason is lack of topological sorting of the DAG, which is going to take years to fix at the current rate of progress :( |
Ok. That is what I suspected. Could perhaps be worth mentioning the reasoning for it in the commit msg. But LGTM on the patch. |
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/138/builds/19860 Here is the relevant piece of the build log for the reference |
mahesh-attarde
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Oct 3, 2025
If X is known never under/poison then skip the freeze and return ComputeNumSignBits(X)
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If X is known never under/poison then skip the freeze and return ComputeNumSignBits(X)