[X86][GISel] Add missing legalization for G_IMPLICIT_DEF #161699

bonsthie · 2025-10-02T17:00:42Z

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.

github-actions · 2025-10-02T17:01:03Z

Thank you for submitting a Pull Request (PR) to the LLVM Project!

This PR will be automatically labeled and the relevant teams will be notified.

If you wish to, you can add reviewers by using the "Reviewers" section on this page.

If this is not working for you, it is probably because you do not have write permissions for the repository. In which case you can instead tag reviewers by name in a comment by using @ followed by their GitHub username.

If you have received no comments on your PR for a week, you can request a review by "ping"ing the PR by adding a comment “Ping”. The common courtesy "ping" rate is once a week. Please remember that you are asking for valuable time from other developers.

If you have further questions, they may be answered by the LLVM GitHub User Guide.

You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums.

llvmbot · 2025-10-02T17:01:39Z

@llvm/pr-subscribers-llvm-globalisel

Author: Bonsthie (bonsthie)

Changes

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.

Full diff: https://github.com/llvm/llvm-project/pull/161699.diff

2 Files Affected:

(modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+21-1)
(added) llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir (+32)

diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 143c4c43e611a..d16dda91cc495 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -91,7 +91,27 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
       .legalFor({p0, s1, s8, s16, s32, s64})
-      .legalFor(Is64Bit, {s128});
+      .legalFor(Is64Bit, {s128})
+      .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+      .legalFor(HasAVX, {v8s32, v4s64})
+      .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})
+      .legalFor(HasAVX512, {v16s32, v8s64})
+      .legalFor(HasBWI, {v64s8, v32s16})
+      .widenScalarOrEltToNextPow2(0, /*Min=*/8)
+      .clampScalarOrElt(0, s8, sMaxScalar)
+      .moreElementsToNextPow2(0)
+      .clampMinNumElements(0, s8, 16)
+      .clampMinNumElements(0, s16, 8)
+      .clampMinNumElements(0, s32, 4)
+      .clampMinNumElements(0, s64, 2)
+      .clampMaxNumElements(0, s8, HasBWI ? 64 : (HasAVX2 ? 32 : 16))
+      .clampMaxNumElements(0, s16, HasBWI ? 32 : (HasAVX2 ? 16 : 8))
+      .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX2 ? 8 : 4))
+      .clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX2 ? 4 : 2))
+      .clampMaxNumElements(0, p0,
+                           Is64Bit ? s64MaxVector.getNumElements()
+                                   : s32MaxVector.getNumElements())
+      .scalarizeIf(scalarOrEltWiderThan(0, 64), 0);
 
   getActionDefinitionsBuilder(G_CONSTANT)
       .legalFor({p0, s8, s16, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
new file mode 100644
index 0000000000000..b02832b9824ad
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
@@ -0,0 +1,32 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,SSE2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX512F 
+
+
+---
+name: test_basic_g_implicit_def_v8i64
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_basic_g_implicit_def_v8i64
+    ; AVX512F: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+    ; AVX2: [[DEF_AVX2:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
+    ; AVX2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_AVX2]](<4 x s64>), [[DEF_AVX2]](<4 x s64>)
+    ; SSE2: [[DEF_SSE2:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
+    ; SSE2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>)
+    %0:_(<8 x s64>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+---
+name: test_g_implicit_def_cample_size
+body: |
+  bb.1:
+   ; CHECK-LABEL: name: test_g_implicit_def_cample_size
+   ; AVX512: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+   ; AVX2: {{%[0-9]+}}:_(<4 x s64>) = G_IMPLICIT_DEF
+   ; SSE2: {{%[0-9]+}}:_(<2 x s64>) = G_IMPLICIT_DEF
+    %0:_(<5 x s63>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+

llvmbot · 2025-10-02T17:01:39Z

@llvm/pr-subscribers-backend-x86

Author: Bonsthie (bonsthie)

Changes

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.

Full diff: https://github.com/llvm/llvm-project/pull/161699.diff

2 Files Affected:

(modified) llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp (+21-1)
(added) llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir (+32)

diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index 143c4c43e611a..d16dda91cc495 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -91,7 +91,27 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
   // s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
   getActionDefinitionsBuilder(G_IMPLICIT_DEF)
       .legalFor({p0, s1, s8, s16, s32, s64})
-      .legalFor(Is64Bit, {s128});
+      .legalFor(Is64Bit, {s128})
+      .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+      .legalFor(HasAVX, {v8s32, v4s64})
+      .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})
+      .legalFor(HasAVX512, {v16s32, v8s64})
+      .legalFor(HasBWI, {v64s8, v32s16})
+      .widenScalarOrEltToNextPow2(0, /*Min=*/8)
+      .clampScalarOrElt(0, s8, sMaxScalar)
+      .moreElementsToNextPow2(0)
+      .clampMinNumElements(0, s8, 16)
+      .clampMinNumElements(0, s16, 8)
+      .clampMinNumElements(0, s32, 4)
+      .clampMinNumElements(0, s64, 2)
+      .clampMaxNumElements(0, s8, HasBWI ? 64 : (HasAVX2 ? 32 : 16))
+      .clampMaxNumElements(0, s16, HasBWI ? 32 : (HasAVX2 ? 16 : 8))
+      .clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX2 ? 8 : 4))
+      .clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX2 ? 4 : 2))
+      .clampMaxNumElements(0, p0,
+                           Is64Bit ? s64MaxVector.getNumElements()
+                                   : s32MaxVector.getNumElements())
+      .scalarizeIf(scalarOrEltWiderThan(0, 64), 0);
 
   getActionDefinitionsBuilder(G_CONSTANT)
       .legalFor({p0, s8, s16, s32})
diff --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
new file mode 100644
index 0000000000000..b02832b9824ad
--- /dev/null
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-g_implicit_def.mir
@@ -0,0 +1,32 @@
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,SSE2
+# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o -  | FileCheck %s --check-prefixes=CHECK,AVX512F 
+
+
+---
+name: test_basic_g_implicit_def_v8i64
+body: |
+  bb.0:
+    ; CHECK-LABEL: name: test_basic_g_implicit_def_v8i64
+    ; AVX512F: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+    ; AVX2: [[DEF_AVX2:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
+    ; AVX2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_AVX2]](<4 x s64>), [[DEF_AVX2]](<4 x s64>)
+    ; SSE2: [[DEF_SSE2:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
+    ; SSE2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>)
+    %0:_(<8 x s64>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+---
+name: test_g_implicit_def_cample_size
+body: |
+  bb.1:
+   ; CHECK-LABEL: name: test_g_implicit_def_cample_size
+   ; AVX512: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
+   ; AVX2: {{%[0-9]+}}:_(<4 x s64>) = G_IMPLICIT_DEF
+   ; SSE2: {{%[0-9]+}}:_(<2 x s64>) = G_IMPLICIT_DEF
+    %0:_(<5 x s63>) = G_IMPLICIT_DEF
+    RET 0, implicit %0
+...
+
+

arsenm · 2025-10-03T08:08:57Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

  getActionDefinitionsBuilder(G_IMPLICIT_DEF)
      .legalFor({p0, s1, s8, s16, s32, s64})
-      .legalFor(Is64Bit, {s128});
+      .legalFor(Is64Bit, {s128})


G_PHI, G_IMPLICIT_DEF, and G_FREEZE (and a few others) should have identical rule sets

Do you mean grouping them under the same ActionDefinitionsBuilder so they share an identical rule set?

Yes. We probably should enforce this somehow. We have an implicit notion of legal types, which we would be better off if we formalized and had the machine verifier enforce. It's certainly weaker than the DAG case, but we do need to guarantee a set of properties to ensure the legalizer can complete

For now I will fuse them in the legalizer, and I’ll look to see how we can enforce this in the machine verifier.

RKSimon · 2025-10-03T09:05:48Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

+      .legalFor(Is64Bit, {s128})
+      .legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
+      .legalFor(HasAVX, {v8s32, v4s64})
+      .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})


HasAVX/AVX2 can be merged into a single .legalFor(HasAVX, {v32s8, v16s16, v8s32, v4s64}) - as all these types are legal on AVX1

Similar for clamping below

I split them because AVX1 lacks 256-bit integer ops, but you’re right that for legalization we only care that the register types exist in the ISA.

RKSimon · 2025-10-03T09:06:40Z

llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp

+      .legalFor(HasAVX, {v8s32, v4s64})
+      .legalFor(HasAVX2, {v32s8, v16s16, v8s32, v4s64})
+      .legalFor(HasAVX512, {v16s32, v8s64})
+      .legalFor(HasBWI, {v64s8, v32s16})


Same as AVX1/2 - HasAVX512 supports all 512-bit vector types

Merge AVX2 types into AVX and AVX512BW types into AVX512, since the vector types are valid in both cases.

…G_CONSTANT_FOLD_BARRIER Unify the legality rule sets for value-transport operations (G_IMPLICIT_DEF, G_PHI, G_FREEZE, and G_CONSTANT_FOLD_BARRIER). These instructions only define/carry values and should therefore accept the same set of legal types.

e-kud

@bonsthie can these newly introduced implicit defs be selected?

e-kud · 2025-10-03T18:05:50Z

llvm/test/CodeGen/X86/GlobalISel/legalize-undef-vec-scaling.mir

Nit: we don't have any g in test names inside X86/GlobalISel. Let's drop it.

bonsthie · 2025-10-04T15:47:16Z

@bonsthie can these newly introduced implicit defs be selected?

You’re right they all get selected except G_FREEZE. I’ll add a lowering to a copy for G_FREEZE, and also add the missing tests.

- Teach the X86 GlobalISel selector to lower G_FREEZE as a plain COPY, since it has no side effects after legalization. - Add tests to verify selection of G_FREEZE -> COPY and missing coverage for G_CONSTANT_FOLD_BARRIER -> COPY. - Rename legalize-g_implicit_def.mir to legalize-undef-vec-scaling.mir to align with existing naming conventions.

RKSimon

LGTM

github-actions · 2025-10-06T09:25:33Z

@bonsthie Congratulations on having your first Pull Request (PR) merged into the LLVM Project!

Your changes will be combined with recent changes from other authors, then tested by our build bots. If there is a problem with a build, you may receive a report in an email or a comment on this PR.

Please check whether problems have been caused by your change specifically, as the builds can include changes from many authors. It is not uncommon for your change to be included in a build that fails due to someone else's changes, or infrastructure issues.

How to do this, and the rest of the post-merge process, is covered in detail here.

If your change does cause a problem, it may be reverted, or you can revert it yourself. This is a normal part of LLVM development. You can fix your changes and open a new PR to merge them again.

If you don't get any reports, no action is required from you. Your changes are working as expected, well done!

[X86][GISel] Add missing legalization for G_IMPLICIT_DEF

81e18b2

Legalize scalar and vector integer types for G_IMPLICIT_DEF at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming G_*_VECTOR legalization, since vector inserts/builds rely on undef bases.

llvmbot added backend:X86 llvm:globalisel labels Oct 2, 2025

Merge branch 'main' into x86-gisel-legalizer-implicit-def

9decd8a

RKSimon requested review from RKSimon and e-kud October 3, 2025 06:31

arsenm reviewed Oct 3, 2025

View reviewed changes

RKSimon requested changes Oct 3, 2025

View reviewed changes

[X86][GISel] Unify AVX/AVX2 and AVX512/AVX512BW type legality

0024770

Merge AVX2 types into AVX and AVX512BW types into AVX512, since the vector types are valid in both cases.

bonsthie force-pushed the x86-gisel-legalizer-implicit-def branch from d68f31c to 2108766 Compare October 3, 2025 12:20

bonsthie force-pushed the x86-gisel-legalizer-implicit-def branch from 2108766 to 381281a Compare October 3, 2025 12:22

e-kud reviewed Oct 3, 2025

View reviewed changes

aemerson approved these changes Oct 6, 2025

View reviewed changes

RKSimon approved these changes Oct 6, 2025

View reviewed changes

Merge branch 'main' into x86-gisel-legalizer-implicit-def

5d2aba5

RKSimon enabled auto-merge (squash) October 6, 2025 08:37

RKSimon merged commit a13ff2c into llvm:main Oct 6, 2025
9 checks passed

[X86][GISel] Add missing legalization for G_IMPLICIT_DEF #161699

[X86][GISel] Add missing legalization for G_IMPLICIT_DEF #161699

Uh oh!

Conversation

bonsthie commented Oct 2, 2025

Uh oh!

github-actions bot commented Oct 2, 2025

Uh oh!

llvmbot commented Oct 2, 2025

Uh oh!

llvmbot commented Oct 2, 2025

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

e-kud left a comment

Choose a reason for hiding this comment

Uh oh!

Choose a reason for hiding this comment

Uh oh!

bonsthie commented Oct 4, 2025 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

Uh oh!

RKSimon left a comment

Choose a reason for hiding this comment

Uh oh!

Uh oh!

github-actions bot commented Oct 6, 2025

Uh oh!

Reviewers

Assignees

Labels

Projects

Milestone

Development

Uh oh!

6 participants

bonsthie commented Oct 4, 2025 •

edited

Loading