[X86][GISel] Add missing legalization for G_IMPLICIT_DEF #161699
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| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,AVX2 | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,SSE2 | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,AVX512F | ||
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| --- | ||
| name: test_basic_g_implicit_def_v8i64 | ||
| body: | | ||
| bb.0: | ||
| ; CHECK-LABEL: name: test_basic_g_implicit_def_v8i64 | ||
| ; AVX512F: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF | ||
| ; AVX2: [[DEF_AVX2:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF | ||
| ; AVX2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_AVX2]](<4 x s64>), [[DEF_AVX2]](<4 x s64>) | ||
| ; SSE2: [[DEF_SSE2:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF | ||
| ; SSE2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>) | ||
| %0:_(<8 x s64>) = G_IMPLICIT_DEF | ||
| RET 0, implicit %0 | ||
| ... | ||
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| --- | ||
| name: test_g_implicit_def_cample_size | ||
| body: | | ||
| bb.1: | ||
| ; CHECK-LABEL: name: test_g_implicit_def_cample_size | ||
| ; AVX512: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF | ||
| ; AVX2: {{%[0-9]+}}:_(<4 x s64>) = G_IMPLICIT_DEF | ||
| ; SSE2: {{%[0-9]+}}:_(<2 x s64>) = G_IMPLICIT_DEF | ||
| %0:_(<5 x s63>) = G_IMPLICIT_DEF | ||
| RET 0, implicit %0 | ||
| ... | ||
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,23 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_cfb_vec256 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $ymm0 | ||
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| ; CHECK-LABEL: name: select_cfb_vec256 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr256 = COPY $ymm0 | ||
| ; CHECK-NOT: G_CONSTANT_FOLD_BARRIER | ||
| ; CHECK-NEXT: $ymm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $ymm1 | ||
| %0:vecr(<8 x s32>) = COPY $ymm0 | ||
| %1:vecr(<8 x s32>) = G_CONSTANT_FOLD_BARRIER %0 | ||
| $ymm1 = COPY %1(<8 x s32>) | ||
| RET 0, implicit $ymm1 | ||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_cfb_vec512 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $zmm0 | ||
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| ; CHECK-LABEL: name: select_cfb_vec512 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr512 = COPY $zmm0 | ||
| ; CHECK-NOT: G_CONSTANT_FOLD_BARRIER | ||
| ; CHECK-NEXT: $zmm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $zmm1 | ||
| %0:vecr(<8 x s64>) = COPY $zmm0 | ||
| %1:vecr(<8 x s64>) = G_CONSTANT_FOLD_BARRIER %0 | ||
| $zmm1 = COPY %1(<8 x s64>) | ||
| RET 0, implicit $zmm1 | ||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,77 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_cfb_scalar_s32 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: gpr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: gpr, preferred-register: '', flags: [ ] } | ||
| liveins: | ||
| fixedStack: | ||
| stack: | ||
| constants: | ||
| body: | | ||
| bb.0: | ||
| liveins: $edi | ||
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| ; CHECK-LABEL: name: select_cfb_scalar_s32 | ||
| ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi | ||
| ; CHECK-NOT: G_CONSTANT_FOLD_BARRIER | ||
| ; CHECK-NEXT: $eax = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $eax | ||
| %0:gpr(s32) = COPY $edi | ||
| %1:gpr(s32) = G_CONSTANT_FOLD_BARRIER %0 | ||
| $eax = COPY %1(s32) | ||
| RET 0, implicit $eax | ||
| ... | ||
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| --- | ||
| name: select_cfb_scalar_s64 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: gpr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: gpr, preferred-register: '', flags: [ ] } | ||
| liveins: | ||
| fixedStack: | ||
| stack: | ||
| constants: | ||
| body: | | ||
| bb.0: | ||
| liveins: $rdi | ||
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| ; CHECK-LABEL: name: select_cfb_scalar_s64 | ||
| ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi | ||
| ; CHECK-NOT: G_CONSTANT_FOLD_BARRIER | ||
| ; CHECK-NEXT: $rax = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $rax | ||
| %0:gpr(s64) = COPY $rdi | ||
| %1:gpr(s64) = G_CONSTANT_FOLD_BARRIER %0 | ||
| $rax = COPY %1(s64) | ||
| RET 0, implicit $rax | ||
| ... | ||
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| --- | ||
| name: select_cfb_vec128 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $xmm0 | ||
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| ; CHECK-LABEL: name: select_cfb_vec128 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 | ||
| ; CHECK-NOT: G_CONSTANT_FOLD_BARRIER | ||
| ; CHECK-NEXT: $xmm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $xmm1 | ||
| %0:vecr(<4 x s32>) = COPY $xmm0 | ||
| %1:vecr(<4 x s32>) = G_CONSTANT_FOLD_BARRIER %0 | ||
| $xmm1 = COPY %1(<4 x s32>) | ||
| RET 0, implicit $xmm1 | ||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_freeze_vec256 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $ymm0 | ||
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| ; CHECK-LABEL: name: select_freeze_vec256 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr256 = COPY $ymm0 | ||
| ; CHECK-NOT: G_FREEZE | ||
| ; CHECK-NEXT: $ymm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $ymm1 | ||
| %0:vecr(<8 x s32>) = COPY $ymm0 | ||
| %1:vecr(<8 x s32>) = G_FREEZE %0 | ||
| $ymm1 = COPY %1(<8 x s32>) | ||
| RET 0, implicit $ymm1 | ||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,23 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_freeze_vec512 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $zmm0 | ||
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| ; CHECK-LABEL: name: select_freeze_vec512 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr512 = COPY $zmm0 | ||
| ; CHECK-NOT: G_FREEZE | ||
| ; CHECK-NEXT: $zmm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $zmm1 | ||
| %0:vecr(<8 x s64>) = COPY $zmm0 | ||
| %1:vecr(<8 x s64>) = G_FREEZE %0 | ||
| $zmm1 = COPY %1(<8 x s64>) | ||
| RET 0, implicit $zmm1 | ||
| ... |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,77 @@ | ||
| # RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s | ||
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| --- | ||
| name: select_freeze_scalar_s32 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: gpr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: gpr, preferred-register: '', flags: [ ] } | ||
| liveins: | ||
| fixedStack: | ||
| stack: | ||
| constants: | ||
| body: | | ||
| bb.0: | ||
| liveins: $edi | ||
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| ; CHECK-LABEL: name: select_freeze_scalar_s32 | ||
| ; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi | ||
| ; CHECK-NOT: G_FREEZE | ||
| ; CHECK-NEXT: $eax = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $eax | ||
| %0:gpr(s32) = COPY $edi | ||
| %1:gpr(s32) = G_FREEZE %0 | ||
| $eax = COPY %1(s32) | ||
| RET 0, implicit $eax | ||
| ... | ||
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| --- | ||
| name: select_freeze_scalar_s64 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: gpr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: gpr, preferred-register: '', flags: [ ] } | ||
| liveins: | ||
| fixedStack: | ||
| stack: | ||
| constants: | ||
| body: | | ||
| bb.0: | ||
| liveins: $rdi | ||
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| ; CHECK-LABEL: name: select_freeze_scalar_s64 | ||
| ; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi | ||
| ; CHECK-NOT: G_FREEZE | ||
| ; CHECK-NEXT: $rax = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $rax | ||
| %0:gpr(s64) = COPY $rdi | ||
| %1:gpr(s64) = G_FREEZE %0 | ||
| $rax = COPY %1(s64) | ||
| RET 0, implicit $rax | ||
| ... | ||
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| --- | ||
| name: select_freeze_vec128 | ||
| legalized: true | ||
| regBankSelected: true | ||
| registers: | ||
| - { id: 0, class: vecr, preferred-register: '', flags: [ ] } | ||
| - { id: 1, class: vecr, preferred-register: '', flags: [ ] } | ||
| body: | | ||
| bb.0: | ||
| liveins: $xmm0 | ||
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| ; CHECK-LABEL: name: select_freeze_vec128 | ||
| ; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0 | ||
| ; CHECK-NOT: G_FREEZE | ||
| ; CHECK-NEXT: $xmm1 = COPY [[COPY]] | ||
| ; CHECK-NEXT: RET 0, implicit $xmm1 | ||
| %0:vecr(<4 x s32>) = COPY $xmm0 | ||
| %1:vecr(<4 x s32>) = G_FREEZE %0 | ||
| $xmm1 = COPY %1(<4 x s32>) | ||
| RET 0, implicit $xmm1 | ||
| ... |
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G_PHI, G_IMPLICIT_DEF, and G_FREEZE (and a few others) should have identical rule sets
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Do you mean grouping them under the same
ActionDefinitionsBuilderso they share an identical rule set?There was a problem hiding this comment.
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Yes. We probably should enforce this somehow. We have an implicit notion of legal types, which we would be better off if we formalized and had the machine verifier enforce. It's certainly weaker than the DAG case, but we do need to guarantee a set of properties to ensure the legalizer can complete
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For now I will fuse them in the legalizer, and I’ll look to see how we can enforce this in the machine verifier.