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[dv,top_earlgrey] Fix pwrmgr_rstmgr_sva_if bind for top #24007
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LGTM except for one typo that seems to cause lint failures
name: "lowrisc:dv:rstmgr_unit_only_sva:0.1" | ||
description: "RSTMGR assertion modules not suitable for chip level and bind file." | ||
name: "lowrisc:dv:pwrmgr_unit_only_sva:0.1" | ||
gdescription: "PWRMGR assertion interfaces not suitable for chip level bind file." |
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gdescription is probably a typo?
gdescription: "PWRMGR assertion interfaces not suitable for chip level bind file." | |
description: "PWRMGR assertion interfaces not suitable for chip level bind file." |
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This seems to cause the failure of the in-depth lint CI check
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Fixed, thanks.
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The assertions pwrmgr_rstmgr_sva_if need to be disabled when either aon or main_pok are inactive. It is more reliable to bind them to rstmgr for top-level simulations. This PR does that and connects rst_slow_ni to &rst_por_aon_n, since rst_por_aon_n is 2-bit wide (one per domain), and captures the rstmgr behavior more accurately. This also removes the rstmgr_unit_only* files for simplicity. Fixes lowRISC#23961 Signed-off-by: Guillermo Maturana <maturana@opentitan.org>
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The failures are unrelated. Merging this. |
The assertions pwrmgr_rstmgr_sva_if need to be disabled when either aon or main_pok are inactive. It is more reliable to bind them to rstmgr for top-level simulations. This PR does that and connects &rst_por_aon_n to rst_slow_ni, since rst_por_aon_n is 2-bit wide (one per domain), and captures the rstmgr behavior more accurately.
Fixes #23961