Eis is a small FPGA computer designed by Lone Dynamics Corporation.
This repo contains schematics, PCB layouts, pinouts, example firmware, gateware, documentation and a 3D printable case.
Find more information on the Eis product page.
Building the blinky example requires Yosys, nextpnr-ice40 and IceStorm.
Assuming they are installed, you can simply type make to build the gateware, which will be written to output/blinky.bin. You can then connect the USB-C port to your computer and use the latest version of ldprog to write the gateware to the device.
The RP2040 firmware, FPGA SRAM and flash MMOD can be programmed over the USB-C port.
Configure the FPGA SRAM:
$ ldprog -i -s blinky.bin
Program the flash MMOD:
$ ldprog -i -f blinky.bin
Eis ships with RP2040 firmware based on the Müsli firmware which allows it to communicate with ldprog.
The firmware is responsible for initializing the system, configuring and outputting the system clock, and either configuring the FPGA or telling the FPGA to configure itself from the MMOD.
The system clock (CLK_RP) is 48MHz by default.
The firmware can be updated by holding down the BOOTSEL button, connecting the USB-C port to your computer, and then dragging and dropping a new UF2 file to the device filesystem.
The firmware can be built from source or you can use the latest eis.uf2 binary from the firmware directory.
Zucker is an experimental RISC-V SOC that supports Eis.
The contents of this repo are released under the Lone Dynamics Open License with the following exceptions:
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The KiCad design files contain parts of the kicad-pmod library which is released under the Apache License, Version 2.0.
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The KiCad design files may contain symbols and footprints released under other licenses; please contact us if we've failed to give proper attribution.
Note: You can use these designs for commercial purposes but we ask that instead of producing exact clones, that you either replace our trademarks and logos with your own or add your own next to ours.