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v.0.6.0-alpha
Install command, run in PowerShell. From an admin PowerShell it installs for the whole machine instead.
irm https://raw.githubusercontent.com/omgitsbase/llmash/main/install.ps1 | iexOn Linux, with sudo sh at the end to install for the whole machine:
curl -fsSL https://raw.githubusercontent.com/omgitsbase/llmash/main/install.sh | shAlready installed: llmash update.
Changed
- A side request no longer pushes a conversation out. A model runs two slots that share one cache, so an agent's short calls between turns (a title, a summary, a tool's sub-task) run beside its long conversation instead of replacing it and forcing the whole conversation to be computed again on the next turn. Qwen3.8 27B (GSQ-RCO 3-bit), 262,144-token context, a 120,000-token conversation with a 30,000-token side call between its turns:
| 0.5.11 | 0.6.0 | |
|---|---|---|
| conversation turn after a side call | 66 s | 0.5 to 0.9 s |
| second side call | 14 s | 0.3 s |
| RAM of the server, peak | 13.8 GB | 6.2 GB |
| RAM of the server, loaded | 8.1 GB | 4.8 GB |
- Same replies. Each request reads only its own run of the shared cache, the view a cache of its own gives it, so replies are the ones one slot gives for the same history: checked token for token on Qwen3.8 27B (3-bit), Gemma 4 E4B (8-bit, assistant drafter) and Qwen3.6 35B-A3B (NVFP4), and on the conversation above against 0.5.11 with that conversation still in its cache. A short call beside a long conversation no longer scans the conversation's cells either.
- Parallel speeds, Qwen3.8 27B, greedy, 600 tokens (
bench/bench_batch.py):
| 0.5.11 | 0.6.0 | |
|---|---|---|
| two streams, default setup | 189 tok/s (second request queued) | 207 tok/s |
four streams, LLMASH_PARALLEL=4 |
364 tok/s | 380 tok/s |
| one stream | 213 tok/s | 213 tok/s, one slot or two |
- Less RAM: the pinned memory for saved prompt states starts at one 1 GB slab and grows while the server is idle, where 0.5.11 pinned the cache's whole size (4 GB) at load. An idle slot leaves the cache only when its cells are in the way of a new request; when they are, the smaller sequence is moved on the card in milliseconds rather than saved to RAM.
LLMASH_SIDE_SLOT=0goes back to a single slot.LLMASH_PARALLELabove 1 keeps a cache per slot, as before.
Runtime
Build 785 (fork commit 8d7218dc9). One slot gives the replies of build 782; the CUDA kernels are unchanged.