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andrew-m-leonardandrew-m-leonard
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8276766: Enable jar and jmod to produce deterministic timestamped content
Signed-off-by: Andrew Leonard <anleonar@redhat.com>
2 parents f4694dc + 7b2d823 commit 6d37243

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‎make/autoconf/basic_windows.m4‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2011, 2020, Oracle and/or its affiliates. All rights reserved.
2+
# Copyright (c) 2011, 2021, Oracle and/or its affiliates. All rights reserved.
33
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
#
55
# This code is free software; you can redistribute it and/or modify it
@@ -34,9 +34,10 @@ AC_DEFUN([BASIC_SETUP_PATHS_WINDOWS],
3434
OPENJDK_BUILD_OS_ENV=windows.wsl1
3535
else
3636
# This test is not guaranteed, but there is no documented way of
37-
# distinguishing between WSL1 and WSL2. Assume only WSL2 has WSL_INTEROP
38-
# in /run/WSL
39-
if test -d "/run/WSL" ; then
37+
# distinguishing between WSL1 and WSL2.
38+
# Check whether "Hyper-V" appears in /proc/interrupts because WSL2 runs on Hyper-V.
39+
$GREP -q Hyper-V /proc/interrupts
40+
if test $? -eq 0; then
4041
OPENJDK_BUILD_OS_ENV=windows.wsl2
4142
else
4243
OPENJDK_BUILD_OS_ENV=windows.wsl1

‎make/modules/jdk.jpackage/Lib.gmk‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -92,9 +92,9 @@ ifeq ($(call isTargetOs, linux), true)
9292
JPACKAGE_LIBAPPLAUNCHER_INCLUDES := $(addprefix -I, $(JPACKAGE_LIBAPPLAUNCHER_SRC))
9393

9494
$(eval $(call SetupJdkLibrary, BUILD_JPACKAGE_LIBAPPLAUNCHER, \
95-
NAME := jpackageapplauncher, \
95+
NAME := jpackageapplauncheraux, \
9696
OUTPUT_DIR := $(JPACKAGE_OUTPUT_DIR), \
97-
SYMBOLS_DIR := $(SUPPORT_OUTPUTDIR)/native/$(MODULE)/libjpackageapplauncher, \
97+
SYMBOLS_DIR := $(SUPPORT_OUTPUTDIR)/native/$(MODULE)/libjpackageapplauncheraux, \
9898
SRC := $(JPACKAGE_LIBAPPLAUNCHER_SRC), \
9999
EXCLUDE_FILES := LinuxLauncher.c LinuxPackage.c, \
100100
TOOLCHAIN := TOOLCHAIN_LINK_CXX, \

‎src/hotspot/cpu/aarch64/aarch64.ad‎

Lines changed: 29 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1199,6 +1199,9 @@ reg_class gov_pr (
11991199
// P7, non-allocatable, preserved with all elements preset to TRUE.
12001200
);
12011201

1202+
reg_class p0_reg(P0);
1203+
reg_class p1_reg(P1);
1204+
12021205
// Singleton class for condition codes
12031206
reg_class int_flags(RFLAGS);
12041207

@@ -5682,6 +5685,24 @@ operand pRegGov()
56825685
interface(REG_INTER);
56835686
%}
56845687

5688+
operand pRegGov_P0()
5689+
%{
5690+
constraint(ALLOC_IN_RC(p0_reg));
5691+
match(RegVectMask);
5692+
op_cost(0);
5693+
format %{ %}
5694+
interface(REG_INTER);
5695+
%}
5696+
5697+
operand pRegGov_P1()
5698+
%{
5699+
constraint(ALLOC_IN_RC(p1_reg));
5700+
match(RegVectMask);
5701+
op_cost(0);
5702+
format %{ %}
5703+
interface(REG_INTER);
5704+
%}
5705+
56855706
// Flags register, used as output of signed compare instructions
56865707

56875708
// note that on AArch64 we also use this register as the output for
@@ -16660,7 +16681,7 @@ instruct partialSubtypeCheckVsZero(iRegP_R4 sub, iRegP_R0 super, iRegP_R2 temp,
1666016681
instruct string_compareU(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
1666116682
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2, rFlagsReg cr)
1666216683
%{
16663-
predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::UU);
16684+
predicate((UseSVE == 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::UU));
1666416685
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
1666516686
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
1666616687

@@ -16670,15 +16691,15 @@ instruct string_compareU(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 c
1667016691
__ string_compare($str1$$Register, $str2$$Register,
1667116692
$cnt1$$Register, $cnt2$$Register, $result$$Register,
1667216693
$tmp1$$Register, $tmp2$$Register,
16673-
fnoreg, fnoreg, fnoreg, StrIntrinsicNode::UU);
16694+
fnoreg, fnoreg, fnoreg, pnoreg, pnoreg, StrIntrinsicNode::UU);
1667416695
%}
1667516696
ins_pipe(pipe_class_memory);
1667616697
%}
1667716698

1667816699
instruct string_compareL(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
1667916700
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2, rFlagsReg cr)
1668016701
%{
16681-
predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::LL);
16702+
predicate((UseSVE == 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::LL));
1668216703
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
1668316704
effect(KILL tmp1, KILL tmp2, USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
1668416705

@@ -16687,7 +16708,7 @@ instruct string_compareL(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 c
1668716708
__ string_compare($str1$$Register, $str2$$Register,
1668816709
$cnt1$$Register, $cnt2$$Register, $result$$Register,
1668916710
$tmp1$$Register, $tmp2$$Register,
16690-
fnoreg, fnoreg, fnoreg, StrIntrinsicNode::LL);
16711+
fnoreg, fnoreg, fnoreg, pnoreg, pnoreg, StrIntrinsicNode::LL);
1669116712
%}
1669216713
ins_pipe(pipe_class_memory);
1669316714
%}
@@ -16696,7 +16717,7 @@ instruct string_compareUL(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4
1669616717
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
1669716718
vRegD_V0 vtmp1, vRegD_V1 vtmp2, vRegD_V2 vtmp3, rFlagsReg cr)
1669816719
%{
16699-
predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::UL);
16720+
predicate((UseSVE == 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::UL));
1670016721
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
1670116722
effect(KILL tmp1, KILL tmp2, KILL vtmp1, KILL vtmp2, KILL vtmp3,
1670216723
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
@@ -16707,7 +16728,7 @@ instruct string_compareUL(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4
1670716728
$cnt1$$Register, $cnt2$$Register, $result$$Register,
1670816729
$tmp1$$Register, $tmp2$$Register,
1670916730
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister,
16710-
$vtmp3$$FloatRegister, StrIntrinsicNode::UL);
16731+
$vtmp3$$FloatRegister, pnoreg, pnoreg, StrIntrinsicNode::UL);
1671116732
%}
1671216733
ins_pipe(pipe_class_memory);
1671316734
%}
@@ -16716,7 +16737,7 @@ instruct string_compareLU(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4
1671616737
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
1671716738
vRegD_V0 vtmp1, vRegD_V1 vtmp2, vRegD_V2 vtmp3, rFlagsReg cr)
1671816739
%{
16719-
predicate(((StrCompNode*)n)->encoding() == StrIntrinsicNode::LU);
16740+
predicate((UseSVE == 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::LU));
1672016741
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
1672116742
effect(KILL tmp1, KILL tmp2, KILL vtmp1, KILL vtmp2, KILL vtmp3,
1672216743
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
@@ -16727,7 +16748,7 @@ instruct string_compareLU(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4
1672716748
$cnt1$$Register, $cnt2$$Register, $result$$Register,
1672816749
$tmp1$$Register, $tmp2$$Register,
1672916750
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister,
16730-
$vtmp3$$FloatRegister,StrIntrinsicNode::LU);
16751+
$vtmp3$$FloatRegister, pnoreg, pnoreg, StrIntrinsicNode::LU);
1673116752
%}
1673216753
ins_pipe(pipe_class_memory);
1673316754
%}

‎src/hotspot/cpu/aarch64/aarch64_sve.ad‎

Lines changed: 99 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5551,6 +5551,105 @@ instruct stringU_indexof_char_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegI_R3 ch,
55515551
ins_pipe(pipe_class_memory);
55525552
%}
55535553

5554+
// Intrisics for String.compareTo()
5555+
5556+
// Note that Z registers alias the corresponding NEON registers, we declare the vector operands of
5557+
// these string_compare variants as NEON register type for convenience so that the prototype of
5558+
// string_compare can be shared with all variants.
5559+
5560+
5561+
instruct string_compareLL_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
5562+
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
5563+
vRegD_V0 vtmp1, vRegD_V1 vtmp2, pRegGov_P0 pgtmp1,
5564+
pRegGov_P1 pgtmp2, rFlagsReg cr)
5565+
%{
5566+
predicate((UseSVE > 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::LL));
5567+
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
5568+
effect(TEMP tmp1, TEMP tmp2, TEMP vtmp1, TEMP vtmp2, TEMP pgtmp1, TEMP pgtmp2,
5569+
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
5570+
5571+
format %{ "String Compare $str1,$cnt1,$str2,$cnt2 -> $result # USE sve" %}
5572+
ins_encode %{
5573+
// Count is in 8-bit bytes; non-Compact chars are 16 bits.
5574+
__ string_compare($str1$$Register, $str2$$Register,
5575+
$cnt1$$Register, $cnt2$$Register, $result$$Register,
5576+
$tmp1$$Register, $tmp2$$Register,
5577+
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister, fnoreg,
5578+
as_PRegister($pgtmp1$$reg), as_PRegister($pgtmp2$$reg),
5579+
StrIntrinsicNode::LL);
5580+
%}
5581+
ins_pipe(pipe_class_memory);
5582+
%}
5583+
5584+
instruct string_compareLU_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
5585+
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
5586+
vRegD_V0 vtmp1, vRegD_V1 vtmp2, pRegGov_P0 pgtmp1,
5587+
pRegGov_P1 pgtmp2, rFlagsReg cr)
5588+
%{
5589+
predicate((UseSVE > 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::LU));
5590+
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
5591+
effect(TEMP tmp1, TEMP tmp2, TEMP vtmp1, TEMP vtmp2, TEMP pgtmp1, TEMP pgtmp2,
5592+
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
5593+
5594+
format %{ "String Compare $str1,$cnt1,$str2,$cnt2 -> $result # USE sve" %}
5595+
ins_encode %{
5596+
// Count is in 8-bit bytes; non-Compact chars are 16 bits.
5597+
__ string_compare($str1$$Register, $str2$$Register,
5598+
$cnt1$$Register, $cnt2$$Register, $result$$Register,
5599+
$tmp1$$Register, $tmp2$$Register,
5600+
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister, fnoreg,
5601+
as_PRegister($pgtmp1$$reg), as_PRegister($pgtmp2$$reg),
5602+
StrIntrinsicNode::LU);
5603+
%}
5604+
ins_pipe(pipe_class_memory);
5605+
%}
5606+
5607+
instruct string_compareUL_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
5608+
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
5609+
vRegD_V0 vtmp1, vRegD_V1 vtmp2, pRegGov_P0 pgtmp1,
5610+
pRegGov_P1 pgtmp2, rFlagsReg cr)
5611+
%{
5612+
predicate((UseSVE > 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::UL));
5613+
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
5614+
effect(TEMP tmp1, TEMP tmp2, TEMP vtmp1, TEMP vtmp2, TEMP pgtmp1, TEMP pgtmp2,
5615+
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
5616+
5617+
format %{ "String Compare $str1,$cnt1,$str2,$cnt2 -> $result # USE sve" %}
5618+
ins_encode %{
5619+
// Count is in 8-bit bytes; non-Compact chars are 16 bits.
5620+
__ string_compare($str1$$Register, $str2$$Register,
5621+
$cnt1$$Register, $cnt2$$Register, $result$$Register,
5622+
$tmp1$$Register, $tmp2$$Register,
5623+
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister, fnoreg,
5624+
as_PRegister($pgtmp1$$reg), as_PRegister($pgtmp2$$reg),
5625+
StrIntrinsicNode::UL);
5626+
%}
5627+
ins_pipe(pipe_class_memory);
5628+
%}
5629+
5630+
instruct string_compareUU_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
5631+
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
5632+
vRegD_V0 vtmp1, vRegD_V1 vtmp2, pRegGov_P0 pgtmp1,
5633+
pRegGov_P1 pgtmp2, rFlagsReg cr)
5634+
%{
5635+
predicate((UseSVE > 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::UU));
5636+
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
5637+
effect(TEMP tmp1, TEMP tmp2, TEMP vtmp1, TEMP vtmp2, TEMP pgtmp1, TEMP pgtmp2,
5638+
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
5639+
5640+
format %{ "String Compare $str1,$cnt1,$str2,$cnt2 -> $result # USE sve" %}
5641+
ins_encode %{
5642+
// Count is in 8-bit bytes; non-Compact chars are 16 bits.
5643+
__ string_compare($str1$$Register, $str2$$Register,
5644+
$cnt1$$Register, $cnt2$$Register, $result$$Register,
5645+
$tmp1$$Register, $tmp2$$Register,
5646+
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister, fnoreg,
5647+
as_PRegister($pgtmp1$$reg), as_PRegister($pgtmp2$$reg),
5648+
StrIntrinsicNode::UU);
5649+
%}
5650+
ins_pipe(pipe_class_memory);
5651+
%}
5652+
55545653
// ---------------------------- Vector mask reductions ---------------------------
55555654
instruct vmask_truecount(iRegINoSp dst, pReg src) %{
55565655
predicate(UseSVE > 0 &&

‎src/hotspot/cpu/aarch64/aarch64_sve_ad.m4‎

Lines changed: 36 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3044,6 +3044,42 @@ dnl $1 $2 $3
30443044
STRING_INDEXOF_CHAR(L, Latin1, true)
30453045
STRING_INDEXOF_CHAR(U, UTF16, false)
30463046

3047+
// Intrisics for String.compareTo()
3048+
3049+
// Note that Z registers alias the corresponding NEON registers, we declare the vector operands of
3050+
// these string_compare variants as NEON register type for convenience so that the prototype of
3051+
// string_compare can be shared with all variants.
3052+
3053+
dnl
3054+
define(`STRING_COMPARETO', `
3055+
instruct string_compare$1_sve(iRegP_R1 str1, iRegI_R2 cnt1, iRegP_R3 str2, iRegI_R4 cnt2,
3056+
iRegI_R0 result, iRegP_R10 tmp1, iRegL_R11 tmp2,
3057+
vRegD_V0 vtmp1, vRegD_V1 vtmp2, pRegGov_P0 pgtmp1,
3058+
pRegGov_P1 pgtmp2, rFlagsReg cr)
3059+
%{
3060+
predicate((UseSVE > 0) && (((StrCompNode*)n)->encoding() == StrIntrinsicNode::$1));
3061+
match(Set result (StrComp (Binary str1 cnt1) (Binary str2 cnt2)));
3062+
effect(TEMP tmp1, TEMP tmp2, TEMP vtmp1, TEMP vtmp2, TEMP pgtmp1, TEMP pgtmp2,
3063+
USE_KILL str1, USE_KILL str2, USE_KILL cnt1, USE_KILL cnt2, KILL cr);
3064+
3065+
format %{ "String Compare $str1,$cnt1,$str2,$cnt2 -> $result # USE sve" %}
3066+
ins_encode %{
3067+
// Count is in 8-bit bytes; non-Compact chars are 16 bits.
3068+
__ string_compare($str1$$Register, $str2$$Register,
3069+
$cnt1$$Register, $cnt2$$Register, $result$$Register,
3070+
$tmp1$$Register, $tmp2$$Register,
3071+
$vtmp1$$FloatRegister, $vtmp2$$FloatRegister, fnoreg,
3072+
as_PRegister($pgtmp1$$reg), as_PRegister($pgtmp2$$reg),
3073+
StrIntrinsicNode::$1);
3074+
%}
3075+
ins_pipe(pipe_class_memory);
3076+
%}')dnl
3077+
dnl $1
3078+
STRING_COMPARETO(LL)
3079+
STRING_COMPARETO(LU)
3080+
STRING_COMPARETO(UL)
3081+
STRING_COMPARETO(UU)
3082+
30473083
// ---------------------------- Vector mask reductions ---------------------------
30483084
instruct vmask_truecount(iRegINoSp dst, pReg src) %{
30493085
predicate(UseSVE > 0 &&

‎src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.cpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -676,7 +676,8 @@ void C2_MacroAssembler::stringL_indexof_char(Register str1, Register cnt1,
676676
// Compare strings.
677677
void C2_MacroAssembler::string_compare(Register str1, Register str2,
678678
Register cnt1, Register cnt2, Register result, Register tmp1, Register tmp2,
679-
FloatRegister vtmp1, FloatRegister vtmp2, FloatRegister vtmp3, int ae) {
679+
FloatRegister vtmp1, FloatRegister vtmp2, FloatRegister vtmp3,
680+
PRegister pgtmp1, PRegister pgtmp2, int ae) {
680681
Label DONE, SHORT_LOOP, SHORT_STRING, SHORT_LAST, TAIL, STUB,
681682
DIFF, NEXT_WORD, SHORT_LOOP_TAIL, SHORT_LAST2, SHORT_LAST_INIT,
682683
SHORT_LOOP_START, TAIL_CHECK;

‎src/hotspot/cpu/aarch64/c2_MacroAssembler_aarch64.hpp‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,8 @@
3232
void string_compare(Register str1, Register str2,
3333
Register cnt1, Register cnt2, Register result,
3434
Register tmp1, Register tmp2, FloatRegister vtmp1,
35-
FloatRegister vtmp2, FloatRegister vtmp3, int ae);
35+
FloatRegister vtmp2, FloatRegister vtmp3,
36+
PRegister pgtmp1, PRegister pgtmp2, int ae);
3637

3738
void string_indexof(Register str1, Register str2,
3839
Register cnt1, Register cnt2,

‎src/hotspot/cpu/aarch64/register_aarch64.hpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -268,6 +268,8 @@ class PRegisterImpl: public AbstractRegisterImpl {
268268
};
269269

270270
// The predicate registers of SVE.
271+
CONSTANT_REGISTER_DECLARATION(PRegister, pnoreg, (-1));
272+
271273
CONSTANT_REGISTER_DECLARATION(PRegister, p0, ( 0));
272274
CONSTANT_REGISTER_DECLARATION(PRegister, p1, ( 1));
273275
CONSTANT_REGISTER_DECLARATION(PRegister, p2, ( 2));

‎src/hotspot/cpu/aarch64/register_definitions_aarch64.cpp‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2002, 2020, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 2002, 2021, Oracle and/or its affiliates. All rights reserved.
33
* Copyright (c) 2014, Red Hat Inc. All rights reserved.
44
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
*
@@ -188,6 +188,8 @@ REGISTER_DEFINITION(FloatRegister, z29);
188188
REGISTER_DEFINITION(FloatRegister, z30);
189189
REGISTER_DEFINITION(FloatRegister, z31);
190190

191+
REGISTER_DEFINITION(PRegister, pnoreg);
192+
191193
REGISTER_DEFINITION(PRegister, p0);
192194
REGISTER_DEFINITION(PRegister, p1);
193195
REGISTER_DEFINITION(PRegister, p2);

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