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pyuvm registers all UVM classes to the factory without the macros from SystemVerilog. So Here is a blog post with details: https://blogs.sw.siemens.com/verificationhorizons/2021/11/17/uvm-factory/ |
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Hello all, speaking about pyuvm is there any difference between the create method call and the python way to create a class ? I know it makes difference in uvm but since there is no factory registration for comp and obj i would guess they are equal am i right? If so what are the differences? Regards
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