Add fjcvtzs instruction to core::arch::aarch64

[linkmauve]

This instruction should only be used when the jsconv feature is checked.

This is useful for instance to Ruffle which otherwise has to use an unsafe asm!() block.

[bjorn3]

There doesn't seem to be any fjcvtzs vendor intrinsic: https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=fjcvtzs

[bjorn3]

Also changes to stdarch should go to https://github.com/rust-lang/stdarch/ instead.

[linkmauve]

Oops, I will open a draft PR in stdarch instead then. Do I need to keep this PR open or should I close it until it is merged in stdarch?

It’s weird that this table doesn’t mention fjcvtzs, it is documented here and is an extension that has been made mandatory in ARMv8.3: https://developer.arm.com/documentation/ddi0602/2024-06/SIMD-FP-Instructions/FJCVTZS--Floating-point-Javascript-convert-to-signed-fixed-point--rounding-toward-zero-

[bjorn3]

Not every arm instruction has a corresponding C vendor intrinsic.

[linkmauve]

Perhaps not C, but LLVM does support this instruction and even has tests for it: https://github.com/llvm/llvm-project/blob/d6d5026b5107b940d7a7853ab16480f83c14384d/llvm/test/CodeGen/AArch64/fjcvtzs.ll

Why would we need a C intrinsic in Rust?

[folkertdev]

I think it's https://github.com/llvm/llvm-project/blob/main/clang/lib/Headers/arm_acle.h#L663

https://godbolt.org/z/vjoo15chj

but yeah this should just be a PR to stdarch itself.