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RISC-V: Use symbolic instructions on inline assembly (part 2) #1936

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RISC-V: Use symbolic instructions on inline assembly (part 2) #1936

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4ce1446
RISC-V: Use symbolic instructions on inline assembly (part 1)
a4lg Sep 30, 2025
96fa6a3
RISC-V: Use symbolic instructions on inline assembly (part 2)
a4lg Sep 30, 2025
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9 changes: 6 additions & 3 deletions crates/core_arch/src/riscv64/mod.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -16,12 +16,13 @@ pub use zk::*;
///
/// This function is unsafe for it accesses the virtual supervisor or user via a `HLV.WU`
/// instruction which is effectively a dereference to any memory address.
#[target_feature(enable = "h")]
#[inline]
#[unstable(feature = "riscv_ext_intrinsics", issue = "114544")]
pub unsafe fn hlv_wu(src: *const u32) -> u32 {
let value: u32;
asm!(
".insn i 0x73, 0x4, {}, {}, 0x681",
"hlv.wu {}, 0({})",
lateout(reg) value,
in(reg) src,
options(readonly, nostack, preserves_flags)
Expand All @@ -39,12 +40,13 @@ pub unsafe fn hlv_wu(src: *const u32) -> u32 {
///
/// This function is unsafe for it accesses the virtual supervisor or user via a `HLV.D`
/// instruction which is effectively a dereference to any memory address.
#[target_feature(enable = "h")]
#[inline]
#[unstable(feature = "riscv_ext_intrinsics", issue = "114544")]
pub unsafe fn hlv_d(src: *const i64) -> i64 {
let value: i64;
asm!(
".insn i 0x73, 0x4, {}, {}, 0x6C0",
"hlv.d {}, 0({})",
lateout(reg) value,
in(reg) src,
options(readonly, nostack, preserves_flags)
Expand All @@ -60,11 +62,12 @@ pub unsafe fn hlv_d(src: *const i64) -> i64 {
///
/// This function is unsafe for it accesses the virtual supervisor or user via a `HSV.D`
/// instruction which is effectively a dereference to any memory address.
#[target_feature(enable = "h")]
#[inline]
#[unstable(feature = "riscv_ext_intrinsics", issue = "114544")]
pub unsafe fn hsv_d(dst: *mut i64, src: i64) {
asm!(
".insn r 0x73, 0x4, 0x37, x0, {}, {}",
"hsv.d {}, 0({})",
in(reg) dst,
in(reg) src,
options(nostack, preserves_flags)
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