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PIC32MZ Ethernet pins
Serge Vakulenko edited this page Mar 21, 2015
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2 revisions
TODO
RMII needs 10 signals to connect the microcontroller to external physical-level Ethernet transceiver (PHY).
The following table lists the default RMII signal assignment for 64-pin, 100-pin anf 144-pin devices. Configuration bits should be set as:
| DEVCFG3 | Function |
|---|---|
| FMIIEN = 0 | Select RMII interface |
| FETHIO = 1 | Use default Ethernet pins |
| Signal | Type | TQFP 64 | TQFP 100 | TQFP 144 | Function |
|---|---|---|---|---|---|
| EREFCLK | I | RE3 (63) | RG9* (16) | RJ11* (27) | Reference Clock |
| ERXD0 | I | RE1 (61) | RB12* (41) | RH8 (81) | Receive Data 0 |
| ERXD1 | I | RE0 (58) | RB13* (42) | RH5* (66) | Receive Data 1 |
| ECRSDV | I | RE2 (62) | RG8* (12) | RH13 (101) | Carrier Sense Data Valid |
| ERXERR | I | RE4* (64) | RB11* (35) | RH4* (65) | Receive Error Input |
| ETXD0 | O | RE6* (2) | RF1 (86) | RJ8* (7) | Transmit Data 0 |
| ETXD1 | O | RE7* (3) | RF0 (85) | RJ9* (8) | Transmit Data 1 |
| ETXEN | O | RE5* (1) | RD2 (77) | RD6 (120) | Transmit Enable |
| EMDC | O | RB15* (30) | RD11 (70) | RD11 (99) | Management Data Clock |
| EMDIO | I/O | RD1 (49) | RD0 (71) | RJ1 (115) | Management Data |
For 64-pin and 100-pin devices, an alternative set of Ethernet pins can be selected:
| DEVCFG3 | Function |
|---|---|
| FMIIEN = 0 | Select RMII interface |
| FETHIO = 0 | Use alternative Ethernet pins |
| Signal | Type | TQFP 64 | TQFP 100 | Function |
|---|---|---|---|---|
| AEREFCLK | I | RD11 (45) | RG9* (16) | Alternate Reference Clock |
| AERXD0 | I | RD9 (43) | RE8* (18) | Alternate Receive Data 0 |
| AERXD1 | I | RD0 (46) | RE9* (19) | Alternate Receive Data 1 |
| AECRSDV | I | RE2 (62) | RG8* (12) | Alternate Carrier Sense Data Valid |
| AERXERR | I | RD3 (51) | RG15* (1) | Alternate Receive Error Input |
| AETXD0 | O | RF1 (57) | RD14* (47) | Alternate Transmit Data 0 |
| AETXD1 | O | RF0 (56) | RD15* (48) | Alternate Transmit Data 1 |
| AETXEN | O | RD2 (50) | RA15 (67) | Alternate Transmit Enable |
| AEMDC | O | RB15* (30) | RD11 (70) | Alternate Management Data Clock |
| AEMDIO | I/O | RD1 (49) | RD0 (71) | Alternate Management Data |
Pins marked with * are assigned as analog inputs by default, and should be propgrammed as digital via ANSELx registers.