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E5M2EffMA 0.2.0
FP8 (E5M2 and E4M3) GEMM, GEMV, casts and fused AdamW for NVIDIA GPUs without native FP8 (sm_50 … sm_87).
Install
PyTorch: pick the wheel matching your Python (cpXY), PyTorch (torchA.B) and its CUDA (cuNNN):
pip install e5m2effma-0.2.0+<cuNNNtorchA.B>-<cpXY>-<cpXY>-linux_x86_64.whlOther combinations: pip install ./binds/python --no-build-isolation from the source archive.
C / C++: unpack e5m2effma-0.2.0-linux-x86_64-cuda12.tar.gz and link lib/libe5m2effma.a (see its README).
Every artifact carries SASS for sm_50, sm_52, sm_53, sm_60, sm_61, sm_62, sm_70, sm_72, sm_75, sm_80, sm_86, sm_87 (CUDA 12.0).
Assets
e5m2effma-0.2.0-linux-x86_64-cuda12.tar.gz(37M)e5m2effma-0.2.0-src.tar.gz(108K)e5m2effma-0.2.0+cu126torch2.7-cp312-cp312-linux_x86_64.whl(39M)
What's in it
get_include(): the wheel shipse5m2effma.hand the device-side codecse5m2effma.cuh(E5M2 / E4M3 decode and RNE encode), so CUDA extensions can build against the installed package instead of a source checkout. The C archive carries them too (src/).- GEMM: register budget of the 128-thread configurations (128 × 64, 64 × 128). They were compiled for 6 blocks per SM (~80 registers) and spilled, 67–82 ms instead of 23–24 ms at 4096³ on a GTX 1080; they now target 4 × 128 threads (≤ 128 registers). The tuned tables do not pick them on the GTX 1080, so its default kernels are unchanged.
- README: using E4M3EffMA and E5M2EffMA together.