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| 1 | +/* |
| 2 | + ******************************************************************************* |
| 3 | + * Copyright (c) 2020, STMicroelectronics |
| 4 | + * All rights reserved. |
| 5 | + * |
| 6 | + * This software component is licensed by ST under BSD 3-Clause license, |
| 7 | + * the "License"; You may not use this file except in compliance with the |
| 8 | + * License. You may obtain a copy of the License at: |
| 9 | + * opensource.org/licenses/BSD-3-Clause |
| 10 | + * |
| 11 | + ******************************************************************************* |
| 12 | + */ |
| 13 | +#if defined(ARDUINO_WeActMiniH723VGTX) |
| 14 | +#include "pins_arduino.h" |
| 15 | + |
| 16 | +// Digital PinName array |
| 17 | +const PinName digitalPin[] = { |
| 18 | + PE_1, // D0 |
| 19 | + PE_0, // D1 |
| 20 | + PB_9, // D2 |
| 21 | + PB_8, // D3 |
| 22 | + PB_7, // D4 |
| 23 | + PB_6, // D5 |
| 24 | + PB_5, // D6 |
| 25 | + PB_4, // D7 |
| 26 | + PB_3, // D8 |
| 27 | + PD_7, // D9 |
| 28 | + PD_6, // D10 |
| 29 | + PD_5, // D11 |
| 30 | + PD_4, // D12 |
| 31 | + PD_3, // D13 |
| 32 | + PD_2, // D14 |
| 33 | + PD_1, // D15 |
| 34 | + PD_0, // D16 |
| 35 | + PC_12, // D17 |
| 36 | + PC_11, // D18 |
| 37 | + PC_10, // D19 |
| 38 | + PA_15, // D20 |
| 39 | + PA_12, // D21 |
| 40 | + PA_11, // D22 |
| 41 | + PA_10, // D23 |
| 42 | + PA_9, // D24 |
| 43 | + PA_8, // D25 |
| 44 | + PC_9, // D26 |
| 45 | + PC_8, // D27 |
| 46 | + PC_7, // D28 |
| 47 | + PC_6, // D29 |
| 48 | + PD_15, // D30 |
| 49 | + PD_14, // D31 |
| 50 | + PD_13, // D32 |
| 51 | + PD_12, // D33 |
| 52 | + PD_11, // D34 |
| 53 | + PD_10, // D35 |
| 54 | + PD_9, // D36 |
| 55 | + PD_8, // D37 |
| 56 | + PB_15, // D38 |
| 57 | + PB_14, // D39 |
| 58 | + PB_13, // D40 |
| 59 | + PB_12, // D41 |
| 60 | + PE_2, // D42 |
| 61 | + PE_3, // D43 |
| 62 | + PE_4, // D44 |
| 63 | + PE_5, // D45 |
| 64 | + PE_6, // D46 |
| 65 | + PC_13, // D47 |
| 66 | + PC_0, // D48/A0 |
| 67 | + PC_1, // D49/A1 |
| 68 | + PC_2_C, // D50/A2 |
| 69 | + PC_3_C, // D51/A3 |
| 70 | + PA_0, // D52/A4 |
| 71 | + PA_1, // D53/A5 |
| 72 | + PA_2, // D54/A6 |
| 73 | + PA_3, // D55/A7 |
| 74 | + PA_4, // D56/A8 |
| 75 | + PA_5, // D57/A9 |
| 76 | + PA_6, // D58/A10 |
| 77 | + PA_7, // D59/A11 |
| 78 | + PC_4, // D60/A12 |
| 79 | + PC_5, // D61/A13 |
| 80 | + PB_0, // D62/A14 |
| 81 | + PB_1, // D63/A15 |
| 82 | + PB_2, // D64 |
| 83 | + PE_7, // D65 |
| 84 | + PE_8, // D66 |
| 85 | + PE_9, // D67 |
| 86 | + PE_10, // D68 |
| 87 | + PE_11, // D69 |
| 88 | + PE_12, // D70 |
| 89 | + PE_13, // D71 |
| 90 | + PE_14, // D72 |
| 91 | + PE_15, // D73 |
| 92 | + PB_10, // D74 |
| 93 | + PB_11, // D75 |
| 94 | + PA_13, // D76 |
| 95 | + PA_14, // D77 |
| 96 | + PC_14, // D78 |
| 97 | + PC_15, // D79 |
| 98 | + PH_0, // D80 |
| 99 | + PH_1 // D81 |
| 100 | +}; |
| 101 | + |
| 102 | +// Analog (Ax) pin number array |
| 103 | +const uint32_t analogInputPin[] = { |
| 104 | + 48, // A0, PC0 |
| 105 | + 49, // A1, PC1 |
| 106 | + 50, // A2, PC2_C |
| 107 | + 51, // A3, PC3_C |
| 108 | + 52, // A4, PA0 |
| 109 | + 53, // A5, PA1 |
| 110 | + 54, // A6, PA2 |
| 111 | + 55, // A7, PA3 |
| 112 | + 56, // A8, PA4 |
| 113 | + 57, // A9, PA5 |
| 114 | + 58, // A10, PA6 |
| 115 | + 59, // A11, PA7 |
| 116 | + 60, // A12, PC4 |
| 117 | + 61, // A13, PC5 |
| 118 | + 62, // A14, PB0 |
| 119 | + 63 // A15, PB1 |
| 120 | +}; |
| 121 | + |
| 122 | +WEAK void SystemClock_Config(void) |
| 123 | +{ |
| 124 | + RCC_OscInitTypeDef RCC_OscInitStruct = {}; |
| 125 | + RCC_ClkInitTypeDef RCC_ClkInitStruct = {}; |
| 126 | + RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {}; |
| 127 | + |
| 128 | + /** Supply configuration update enable |
| 129 | + */ |
| 130 | + HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); |
| 131 | + |
| 132 | + /** Configure the main internal regulator output voltage |
| 133 | + */ |
| 134 | + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0); |
| 135 | + |
| 136 | + while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {} |
| 137 | + |
| 138 | + /** Configure LSE Drive Capability |
| 139 | + */ |
| 140 | + HAL_PWR_EnableBkUpAccess(); |
| 141 | + __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_HIGH); |
| 142 | + |
| 143 | + /** Initializes the RCC Oscillators according to the specified parameters |
| 144 | + * in the RCC_OscInitTypeDef structure. |
| 145 | + */ |
| 146 | + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_LSE; |
| 147 | + RCC_OscInitStruct.HSEState = RCC_HSE_ON; |
| 148 | + RCC_OscInitStruct.LSEState = RCC_LSE_ON; |
| 149 | + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; |
| 150 | + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; |
| 151 | + RCC_OscInitStruct.PLL.PLLM = 5; |
| 152 | + RCC_OscInitStruct.PLL.PLLN = 48; |
| 153 | + RCC_OscInitStruct.PLL.PLLP = 1; |
| 154 | + RCC_OscInitStruct.PLL.PLLQ = 5; |
| 155 | + RCC_OscInitStruct.PLL.PLLR = 2; |
| 156 | + RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2; |
| 157 | + RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; |
| 158 | + RCC_OscInitStruct.PLL.PLLFRACN = 0; |
| 159 | + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { |
| 160 | + Error_Handler(); |
| 161 | + } |
| 162 | + |
| 163 | + /** Initializes the CPU, AHB and APB buses clocks |
| 164 | + */ |
| 165 | + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK |
| 166 | + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
| 167 | + | RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1; |
| 168 | + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; |
| 169 | + RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1; |
| 170 | + RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1; |
| 171 | + RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2; |
| 172 | + RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2; |
| 173 | + RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2; |
| 174 | + RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2; |
| 175 | + |
| 176 | + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { |
| 177 | + Error_Handler(); |
| 178 | + } |
| 179 | + |
| 180 | + PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_OSPI |
| 181 | + | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC |
| 182 | + | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16 |
| 183 | + | RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123 |
| 184 | + | RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123 |
| 185 | + | RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6; |
| 186 | + PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL; |
| 187 | + PeriphClkInitStruct.OspiClockSelection = RCC_OSPICLKSOURCE_D1HCLK; |
| 188 | + PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL; |
| 189 | + PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2; |
| 190 | + PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1; |
| 191 | + PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16910CLKSOURCE_D2PCLK2; |
| 192 | + PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1; |
| 193 | + PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C1235CLKSOURCE_D2PCLK1; |
| 194 | + PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1; |
| 195 | + PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL; |
| 196 | + PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1; |
| 197 | + PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1; |
| 198 | + |
| 199 | + |
| 200 | + if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) { |
| 201 | + Error_Handler(); |
| 202 | + } |
| 203 | +} |
| 204 | + |
| 205 | +#endif /* ARDUINO_GENERIC_* */ |
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