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Revise comment of MIE.MEIE #20

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Merged
merged 1 commit into from
Sep 7, 2025
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Revise comment of MIE.MEIE #20

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2 changes: 1 addition & 1 deletion arch/riscv/boot.c
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Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,7 @@ __attribute__((naked, section(".text.prologue"))) void _entry(void)
"csrw mtvec, t0\n"

/* Enable machine-level external interrupts (MIE.MEIE).
* This allows peripherals like the CLINT timer to raise interrupts.
* This allows peripherals like the UART to raise interrupts.
* Global interrupts remain disabled by mstatus.MIE until the scheduler
* is ready.
*/
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