dts: stm32f7(6/7)xxx: can2/3: convert to stm32-bxcan

This renames the compatible string to 'stm32-bxcan' and add default
properties 'sjw' and 'sample-point' related to upstream changes:

- zephyrproject-rtos/zephyr#61494
- zephyrproject-rtos/zephyr#62816

Signed-off-by: Stephan Linz <linz@li-pro.net>

dts/arm/st/f7/stm32f7-can2.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021 TiaC Systems
+ * Copyright (c) 2021-2023 TiaC Systems
  * Copyright (c) 2021 Li-Pro.Net
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,15 +8,15 @@
 	soc {
 		// missed in st/f7/stm32f767.dtsi
 		can2: can@40006800 {
-			compatible = "st,stm32-can";
-			#address-cells = <1>;
-			#size-cells = <0>;
+			compatible = "st,stm32-bxcan";
 			reg = <0x40006800 0x400>;
 			interrupts = <63 0>, <64 0>, <65 0>, <66 0>;
 			interrupt-names = "TX", "RX0", "RX1", "SCE";
 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x04000000>;
 			master-can-reg = <0x40006400>;
 			status = "disabled";
+			sjw = <1>;
+			sample-point = <875>;
 		};
 	};
 };

dts/arm/st/f7/stm32f7-can3.dtsi

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2021 TiaC Systems
+ * Copyright (c) 2021-2023 TiaC Systems
  * Copyright (c) 2021 Li-Pro.Net
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,14 +8,14 @@
 	soc {
 		// missed in st/f7/stm32f767.dtsi
 		can3: can@40003400 {
-			compatible = "st,stm32-can";
-			#address-cells = <1>;
-			#size-cells = <0>;
+			compatible = "st,stm32-bxcan";
 			reg = <0x40003400 0x400>;
 			interrupts = <104 0>, <105 0>, <106 0>, <107 0>;
 			interrupt-names = "TX", "RX0", "RX1", "SCE";
 			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00002000>;
 			status = "disabled";
+			sjw = <1>;
+			sample-point = <875>;
 		};
 	};
 };