👾 Design and implementation of a video decoder on an Altera Cyclone V FPGA board.
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Updated
Apr 2, 2018 - Verilog
👾 Design and implementation of a video decoder on an Altera Cyclone V FPGA board.
Display of various animated digital and analog clock using VGA control in FPGA
Implementation of a circuit that generates a video signal for a specific display format.
C- minus compiler for the Hydra microprocessor architecture
Collection of my projects that was made as a part of Warsaw University FPGA course
Taiko no Tatsujin inspired game built with Verilog
👻 Simple Undertale-like game on Basys3 FPGA written in Verilog
FPGA project: board connects to PC via cable, the user sends instructions (e.g. mouse move, mouse set, write a number, write a letter, etc) via FPGA interface.
Simple example programs for the Lattice iCEblink40-HX1K Evaluation Kit in Verilog for fun and learning.
Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL
This project includes code for running a simple game with FPGA's VGA pmod port
Projekt zaliczeniowy w ramach przedmiotu "Systemy Cyfrowe". Projekt miał na celu stworzenie układu DSP do pomiaru odległości za pomocą odbitego światła lasera. Wykonano układ który można finalnie uruchomić na płytce Cyclone IV Altera (model EP4CE6E22), który można sterować bezpośrednio na płytce. Objaśnienie projektu znajduje się w załączonym do…
A FPGA implementation of Ben Eater's SAP-1 computer using the Digilent's BASYS 3 board.
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