Computer Architecture
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Updated
Dec 6, 2017 - VHDL
Computer Architecture
A variety of logic circuits coded with VHDL
4-bit ripple adder, which adds 2 4-bit inputs introducing sum and carry signals and implementing. 1. Half adder. 2. Full adder using the half adder. 3. 4-bit ripple adder/subtractor using the full adder.
Logic Design.
About implementation of 4-bit BCD up/down counter. The counter work as follows: ● If input X = 0, the counter counts up. Otherwise, it counts down. ● If counting up, the counter’s value should be: 0000, 0001, 0010... ● If counting down: 0010, 0001, 0000...
implementation of 4-bit BCD up/down counter. The counter work as follows: ● If input X = 0, the counter counts up. Otherwise, it counts down. ● If counting up, the counter’s value should be: 0000, 0001, 0010... ● If counting down: 0010, 0001, 0000...
implementation of 4-bit BCD up/down counter. The counter work as follows: ● If input X = 0, the counter counts up. Otherwise, it counts down. ● If counting up, the counter’s value should be: 0000, 0001, 0010... ● If counting down: 0010, 0001, 0000...
Assignment 1, Digital Logic Design Lab, Spring 2021, IIT Bombay
Study of topics related to the design of modern microprocessors, including Boolean algebra, logic gates, design simplification techniques, memory design, programmable control units, and use of hardware description languages.
vhdl
A set of code examples for Tang Nano 1K FPGA board.
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