Skip to content
#

netgen

Star

Here is 1 public repository matching this topic...

Language: Coq
Filter by language
All 16 Python 4 Shell 3 PHP 2 C++ 1 CSS 1 Coq 1 Cuda 1 Roff 1 Lua 1 Verilog 1

vsdip / vsdflow

Star 13

VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes contro…

opensource magic static tcl scripting-language rtl programmer synthesis yosys semiconductor netgen sta opensta qflow vsdip graywolf qrouter opentimer blifffanout physicaldesign
  • Updated Jul 21, 2020
  • Coq

Improve this page

Add a description, image, and links to the netgen topic page so that developers can more easily learn about it.

Curate this topic

Add this topic to your repo

To associate your repository with the netgen topic, visit your repo's landing page and select "manage topics."

Learn more