Negative replicate gives Internal Error num member accessed when data type is UNINITIALIZED
#3963
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Can you extract into a minimal example please? |
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A minimal example that crashes with internal error looks like this `timescale 1ns / 1ns
module receiver
#(
parameter IN_DW = 32,
parameter OUT_DW = 24
)
(
input clk_i,
output reg [OUT_DW-1:0] m_axis_out_tdata
);
localparam REQUIRED_OUT_DW = OUT_DW + 5;
reg [REQUIRED_OUT_DW - 1: 0] filter_result;
always @(posedge clk_i) begin
if (REQUIRED_OUT_DW >= OUT_DW) begin
m_axis_out_tdata <= filter_result[REQUIRED_OUT_DW - 1 -: OUT_DW];
end else begin
m_axis_out_tdata <= {{(OUT_DW - REQUIRED_OUT_DW){1'b0}}, filter_result};
end
end
endmoduleI run it with This does not crash `timescale 1ns / 1ns
module receiver
#(
parameter IN_DW = 32,
parameter OUT_DW = 24
)
(
input clk_i,
output reg [OUT_DW-1:0] m_axis_out_tdata
);
localparam REQUIRED_OUT_DW = OUT_DW + 5;
reg [REQUIRED_OUT_DW - 1: 0] filter_result;
always @(posedge clk_i) begin
if (REQUIRED_OUT_DW >= OUT_DW) begin
m_axis_out_tdata <= filter_result[REQUIRED_OUT_DW - 1 -: OUT_DW];
end else begin
// m_axis_out_tdata <= {{(OUT_DW - REQUIRED_OUT_DW){1'b0}}, filter_result};
end
end
endmodule@wsnyder the crash seems to be caused by the line Also this does not crash `timescale 1ns / 1ns
module receiver
#(
parameter IN_DW = 32,
parameter OUT_DW = 24
)
(
input clk_i,
output reg [OUT_DW-1:0] m_axis_out_tdata
);
localparam REQUIRED_OUT_DW = OUT_DW - 5;
reg [REQUIRED_OUT_DW - 1: 0] filter_result;
always @(posedge clk_i) begin
if (REQUIRED_OUT_DW >= OUT_DW) begin
m_axis_out_tdata <= filter_result[REQUIRED_OUT_DW - 1 -: OUT_DW];
end else begin
m_axis_out_tdata <= {{(OUT_DW - REQUIRED_OUT_DW){1'b0}}, filter_result};
end
end
endmodule |
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When I run it with v4.106 I get this interesting error message When I run it with v4.228 I get the same error message as in my first post |
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Debug output |
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This is a workaround for the bug `timescale 1ns / 1ns
module receiver
#(
parameter IN_DW = 32,
parameter OUT_DW = 24
)
(
input clk_i,
output reg [OUT_DW-1:0] m_axis_out_tdata
);
localparam REQUIRED_OUT_DW = OUT_DW + 5;
reg [REQUIRED_OUT_DW - 1: 0] filter_result;
localparam PAD_BITS = REQUIRED_OUT_DW >= OUT_DW ? 0 : OUT_DW - REQUIRED_OUT_DW;
always @(posedge clk_i) begin
if (REQUIRED_OUT_DW >= OUT_DW) begin
// take some MSBs
m_axis_out_tdata <= filter_result[REQUIRED_OUT_DW - 1 -: OUT_DW];
end else begin
// do zero padding
m_axis_out_tdata <= {{(PAD_BITS){1'b0}}, filter_result};
end
end
endmodule |
wsnyder
changed the title
num member accessed when data type is UNINITIALIZEDnum member accessed when data type is UNINITIALIZED
wsnyder
added a commit
that referenced
this issue
Feb 23, 2023
wsnyder
added
area: lint
|
Your code before workaround has effectively "{24-29}{1'b0}", and since concatenate sizes are unsigned this is a huge vector, which causes the crash. The way you worked around it, or similar, I believe is required by IEEE. |
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I am getting the error
Internal Error: ../V3Number.h:196: `num` member accessed when data type is UNINITIALIZEDMy verilator version is 5.006 compiled from git.
I am running it with this command line
The repo with the code is here: https://github.com/catkira/open5G_rx/tree/try_verilator
The bug can be reproduced by running tests/test_receiver.py
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