Internal Error: ../V3LinkDot.cpp:3785: class reference parameter not removed by V3Param

[em2machine]

Can you please attach an example that shows the issue or missing feature?

I'm working on it. This is from the same (very large) design as was attempting to rebuild that produced #6418. I have a little debug info, but this one seems to be a combination of pretty deep parameterized hierarchy alongside similar usage as the previous issue. bugpoint doesn't converge so I am attempting to bisect.... Similar to #6418 this built in the previously referenced version. I wanted to open in parallel to attempting to whittle it down in case there are any ideas.

What output from that test indicates it is wrong, and what is the correct or expected output? (Or, please make test self-checking if possible.)

%Error: Internal Error:  ../V3LinkDot.cpp:3785: class reference parameter not removed by V3Param
                                                                   : ... note: In instance 'XYZ_wrap'
  227 |             outb[i] = ohm_c#(p_width)::ohm(sel, bus_array[i]);
      |                       ^~~~~
                        ... See the manual at https://verilator.org/verilator_doc.html?v=5.041 for more assistance.

I did enable dump-tree and debug to attempt to get a better point in the design hierarchy to anchor to...

%Error: Internal Error: ../V3Broken.cpp:169: Broken link in node (or something without maybePointedTo): 'm_classOrPackageNodep && !m_classOrPackageNodep->brokeExists()' @ ./V3Ast__gen_impl.h:1223
                                                                   : ... note: In instance 'XYZ_wrap'
-node: CLASSORPACKAGEREF 0x600000cd76c0 <e3180> {g243az} @dt=0x0@  reverse_c cpkg=0x159e0c620 -> CLASS 0x159e0c620 <e1877864> {g194am}  reverse_c  L4 [1ps] [VIRT]
  243 |          inb_reversed = reverse_c#(p_width)::reverse(inb);

This is the package that contains a library of parameterized functions that is used pervasively throughout the design. Unfortunately a simple testcase that just instantiates say a parameterized instance of blshift (pf::blshift_c#(4)::blshift() for instance) doesn't trigger the internal error.

package pf;

   virtual class reverse_c #(parameter p_width=4);
      static function logic[p_width-1:0] reverse(
         input logic[p_width-1:0] inb
      );
     <snip>
      endfunction
   endclass

   virtual class ohm_c #(parameter p_width=4);
      static function ohm(
         input logic[p_width-1:0] sel
         ,input logic[p_width-1:0] inb
      );
        <snip>
      endfunction
   endclass
   
   virtual class brshift_c #(parameter p_width=4);
      static function logic[p_width-1:0] brshift(
         input logic[p_width-1:0] inb
         ,input logic[p_width-1:0] sel
      );
        <snip>
      endfunction
   endclass
   
   virtual class blshift_c #(parameter p_width=4);
      static function logic[p_width-1:0] blshift(
         input logic[p_width-1:0] inb
         ,input logic[p_width-1:0] sel
      );
        <snip>
         inb_reversed = reverse_c#(p_width)::reverse(inb);
         rslt = brshift_c#(p_width)::brshift(inb_reversed, sel);
         rslt_reversed = reverse_c#(p_width)::reverse(rslt);
       <snip>
      endfunction
   endclass

endpackage

What 'verilator --version' are you using? Did you try it with the git master version? Did you try it with other simulators?

Verilator 5.041 devel rev v5.040-94-g990ee994d

What OS and distribution are you using?

Darwin easyemachine.local 24.6.0 Darwin Kernel Version 24.6.0: Mon Jul 14 11:30:40 PDT 2025; root:xnu-11417.140.69~1/RELEASE_ARM64_T6041 arm64

Thanks,
-e-

[em2machine]

Perhaps a naive question: Enabling --debugi 10 doesn't give me much to correlate back in terms of where in the hierarchy this might be happening. Is there any particular set of debug flags that I should use to help narrow in?

- V3FileLine.cpp:193: Get Stream[ct27+473]:   localparam ATOP_SMAX  = 3'b100;
- V3FileLine.cpp:193: Get Stream[ct27+476]:   localparam ATOP_SMIN  = 3'b101;
- V3FileLine.cpp:193: Get Stream[ct27+479]:   localparam ATOP_UMAX  = 3'b110;
- V3FileLine.cpp:193: Get Stream[ct27+482]:   localparam ATOP_UMIN  = 3'b111;
- V3FileLine.cpp:193: Get Stream[ct7+293]:          inb_reversed = reverse_c#(p_width)::reverse(inb);
%Error: Internal Error: <SNIP> ../V3Broken.cpp:169: Broken link in node (or something without maybePointedTo): 'm_classOrPackageNodep && !m_classOrPackageNodep->brokeExists()' @ ./V3Ast__gen_impl.h:1223
                                                                   : ... note: In instance 'XYZ_wrap'
-node: CLASSORPACKAGEREF 0x600002493600 <e3180> {g243az} @dt=0x0@  reverse_c cpkg=0x13d80a3d0 -> CLASS 0x13d80a3d0 <e3363684> {g194am}  reverse_c  L4 [1ps] [VIRT]
  243 |          inb_reversed = reverse_c#(p_width)::reverse(inb);
      |                         ^~~~~~~~~
                        ... See the manual at https://verilator.org/verilator_doc.html?v=5.041 for more assistance.

[em2machine]

Ok, through some serious bisection luck:

@easyemachine verilator_fixes % verilator --cc --top-module the_top test3.sv
%Error: Internal Error: test3.sv:15:25: ../V3LinkDot.cpp:3785: class reference parameter not removed by V3Param
                                      : ... note: In instance 'the_top'
   15 |          inb_reversed = reverse_c#(p_width)::reverse(inb);
      |                         ^~~~~~~~~
                        ... See the manual at https://verilator.org/verilator_doc.html?v=5.041 for more assistance.

package pf;
   virtual class reverse_c #(parameter p_width=4);
      static function logic[p_width-1:0] reverse(
         input logic[p_width-1:0] inb
      );
      endfunction
   endclass

   virtual class blshift_c #(parameter p_width=4);
      static function logic[p_width-1:0] blshift(
         input logic[p_width-1:0] inb
      );
         logic[p_width-1:0] inb_reversed;
         inb_reversed = reverse_c#(p_width)::reverse(inb);
      endfunction
   endclass
endpackage

module pri_sel #(parameter int unsigned p_width = 4)(
   input logic [p_width-1:0] inb_i
);
   logic [p_width-1:0] token_q, lalign;
   assign lalign = pf::blshift_c#(p_width)::blshift(inb_i);
endmodule

module pri_handler_rv #(
   parameter int unsigned p_num_bus = 8
   // do not override
   ,parameter type strand_t = logic [p_num_bus-1:0]
)(
   input strand_t vld_a_i
);
   pri_sel #(p_num_bus) pri_sel(
      .inb_i(vld_a_i)
   );
endmodule
  
module the_top();
   localparam int p_num_entries = 10;
   
   logic [p_num_entries-1:0] pcache_rq_vld_a;

   pri_handler_rv #(
      .p_num_bus(p_num_entries)
   ) pcache_rq_handler(
      .vld_a_i(pcache_rq_vld_a)
   );
endmodule

[ArturBieniek4]

This bug is a regression introduced in #6421 and will get fixed in #6429.

[em2machine]

I can confirm that this now builds without error.

However there must be a runtime functional difference as all of the tests in regressions now fail on the built model. Right now I don't have any idea on where there is a delta. I suspect that its in areas where I have no-XYZW applied to hide warnings (mostly width and some unoptflat). Not sure yet how to go and debug what the functional execution delta might be.

Anyone know of an (automated) way to compare FST waves up to a divergence as its pretty trivial to dump waveforms from both models....
-e-

[wsnyder]

All I can suggest is fst2vcd, then vcddiff. Might be a better way...

[em2machine]

Ok, thx. Sounds like a fun Sunday afternoon project ^^

[em2machine]

Just a quick followup on this. All back up and running. Was a subtle time 0 init issue. Thanks much. Good stuff.