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Fix dtype of condition operation on class objects #4352

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merged 4 commits into from
Aug 7, 2023

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@RRozak RRozak commented Jul 10, 2023

Currently on master, the dtype of AstNodeCond with expressions of class types is wrong, if the class types aren't the same and if the node was created after V3Width. It doesn't occur if the node was created before V3Width, because the dtype is correctly set in that phase. I mentioned that problem in #4345.
It fixes this problem by using the function from V3Width in constructor of AstNodeCond, instead of taking the dtype of one of its expressions.

wsnyder added a commit that referenced this pull request Jul 10, 2023
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test_regress/t/t_func_tasknsvar_bad.out Outdated Show resolved Hide resolved
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 17, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 17, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 18, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 21, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 21, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 24, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
RRozak added a commit to antmicro/uvm-verilator that referenced this pull request Jul 24, 2023
It is already solved: verilator/verilator#4352

Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
puneet pushed a commit to coverify/verilator that referenced this pull request Jul 27, 2023
Signed-off-by: Ryszard Rozak <rrozak@antmicro.com>
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RRozak commented Aug 7, 2023

I removed the unnecessary copying of the dtype node. Do You think it can be merged now, @wsnyder?

@wsnyder wsnyder merged commit 2d9bc73 into verilator:master Aug 7, 2023
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puneet pushed a commit to coverify/verilator that referenced this pull request Aug 25, 2023
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2 participants