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@jty2 jty2 commented Oct 19, 2021

On aarch64, prefetch64() takes a pointer to the lock, but dereferences the
pointer as the address to prefetch. Don't do that; it causes memory accesses to
a random memory location (i.e. takes the literal lock value as the address).
Instead, just pass the value of the pointer into the PRFM instruction.

On aarch64, prefetch64() takes a pointer to the lock, but dereferences the
pointer as the address to prefetch.  Don't do that; it causes memory acceses to
a random memory location.  Instead, just pass the value of the pointer into the
PRFM instruction.
@rpgolshan rpgolshan merged commit 29a2e39 into ARM-software:master Oct 19, 2021
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Actually, this patch is wrong and should not have been merged. It will store ptr onto the stack and then try to prefetch that stack address. The original code appears to do the right thing.

void with1(unsigned long * ptr) {
    asm volatile ("prfm pstl1keep, %[ptr]" : : [ptr] "Q" (ptr));
}

0000000000000000 <with1>:
   0:   d10043ff        sub     sp, sp, #0x10
   4:   f90007e0        str     x0, [sp, #8]
   8:   910023e0        add     x0, sp, #0x8
   c:   f9800010        prfm    pstl1keep, [x0]
  10:   910043ff        add     sp, sp, #0x10
  14:   d65f03c0        ret


void with2(unsigned long * ptr) {
    asm volatile ("prfm pstl1keep, %[ptr]" : : [ptr] "Q" (*ptr));
}


0000000000000018 <with2>:
  18:   f9800010        prfm    pstl1keep, [x0]
  1c:   d65f03c0        ret



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2 participants