patches: arm64: Update for 6.5-rc3 fast forward

patches/arm64/7ee8acd1b803502878992acd6f99e61f1e8c7a25.patch

@@ -0,0 +1,140 @@
+From 7ee8acd1b803502878992acd6f99e61f1e8c7a25 Mon Sep 17 00:00:00 2001
+From: Arnd Bergmann <arnd@arndb.de>
+Date: Fri, 16 Jun 2023 16:48:47 +0200
+Subject: media: verisilicon: fix excessive stack usage
+
+In some configurations, gcc decides not to inline the register accessor
+functions, which in turn leads to lots of temporary hantro_reg structures
+on the stack that cannot be eliminated because they escape into an
+uninlined function:
+
+drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c:1022:1: warning: the frame size of 1112 bytes is larger than 1024 bytes [-Wframe-larger-than=]
+
+Mark all of these as __always_inline so the compiler is able to completely
+eliminate the temporary structures instead, which brings the stack usage
+back down to just the normal local variables.
+
+Closes: https://lore.kernel.org/oe-kbuild-all/202306151506.goHEegOd-lkp@intel.com/
+[hverkuil: fix function prototype alignment, wrap commit log]
+
+Reported-by: kernel test robot <lkp@intel.com>
+Fixes: 727a400686a2 ("media: verisilicon: Add Rockchip AV1 decoder")
+Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
+Tested-by: Nathan Chancellor <nathan@kernel.org>
+Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
+Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
+---
+ drivers/media/platform/verisilicon/hantro.h | 42 ++++++++++++++---------------
+ 1 file changed, 21 insertions(+), 21 deletions(-)
+
+diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h
+index 6523ffb748812..1afec3df8c73b 100644
+--- a/drivers/media/platform/verisilicon/hantro.h
++++ b/drivers/media/platform/verisilicon/hantro.h
+@@ -370,26 +370,26 @@ extern int hantro_debug;
+ 	pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
+
+ /* Structure access helpers. */
+-static inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
++static __always_inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
+ {
+ 	return container_of(fh, struct hantro_ctx, fh);
+ }
+
+ /* Register accessors. */
+-static inline void vepu_write_relaxed(struct hantro_dev *vpu,
+-				      u32 val, u32 reg)
++static __always_inline void vepu_write_relaxed(struct hantro_dev *vpu,
++					       u32 val, u32 reg)
+ {
+ 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ 	writel_relaxed(val, vpu->enc_base + reg);
+ }
+
+-static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
++static __always_inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
+ {
+ 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ 	writel(val, vpu->enc_base + reg);
+ }
+
+-static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
++static __always_inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
+ {
+ 	u32 val = readl(vpu->enc_base + reg);
+
+@@ -397,27 +397,27 @@ static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
+ 	return val;
+ }
+
+-static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
+-				      u32 val, u32 reg)
++static __always_inline void vdpu_write_relaxed(struct hantro_dev *vpu,
++					       u32 val, u32 reg)
+ {
+ 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ 	writel_relaxed(val, vpu->dec_base + reg);
+ }
+
+-static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
++static __always_inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
+ {
+ 	vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ 	writel(val, vpu->dec_base + reg);
+ }
+
+-static inline void hantro_write_addr(struct hantro_dev *vpu,
+-				     unsigned long offset,
+-				     dma_addr_t addr)
++static __always_inline void hantro_write_addr(struct hantro_dev *vpu,
++					      unsigned long offset,
++					      dma_addr_t addr)
+ {
+ 	vdpu_write(vpu, addr & 0xffffffff, offset);
+ }
+
+-static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
++static __always_inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
+ {
+ 	u32 val = readl(vpu->dec_base + reg);
+
+@@ -425,9 +425,9 @@ static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
+ 	return val;
+ }
+
+-static inline u32 vdpu_read_mask(struct hantro_dev *vpu,
+-				 const struct hantro_reg *reg,
+-				 u32 val)
++static __always_inline u32 vdpu_read_mask(struct hantro_dev *vpu,
++					  const struct hantro_reg *reg,
++					  u32 val)
+ {
+ 	u32 v;
+
+@@ -437,16 +437,16 @@ static inline u32 vdpu_read_mask(struct hantro_dev *vpu,
+ 	return v;
+ }
+
+-static inline void hantro_reg_write(struct hantro_dev *vpu,
+-				    const struct hantro_reg *reg,
+-				    u32 val)
++static __always_inline void hantro_reg_write(struct hantro_dev *vpu,
++					     const struct hantro_reg *reg,
++					     u32 val)
+ {
+ 	vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
+ }
+
+-static inline void hantro_reg_write_s(struct hantro_dev *vpu,
+-				      const struct hantro_reg *reg,
+-				      u32 val)
++static __always_inline void hantro_reg_write_s(struct hantro_dev *vpu,
++					       const struct hantro_reg *reg,
++					       u32 val)
+ {
+ 	vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
+ }
+-- 
+cgit 
+

patches/arm64/series

@@ -1,5 +1 @@
-08f6554ff90ef189e6b8f0303e57005bddfdd6a7.patch
-a7e5eb53bf9b800d086e2ebcfebd9a3bb16bd1b0.patch
-cff6e7f50bd315e5b39c4e46c704ac587ceb965f.patch
-feb843a469fb0ab00d2d23cfb9bcc379791011bb.patch
-43fc0a99906e04792786edf8534d8d58d1e9de0c.patch
+7ee8acd1b803502878992acd6f99e61f1e8c7a25.patch