Part 12 GPU

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Part 12 - GPU

This is a huge can of worms. But at the end of the day, the entire purpose of this device is to arrange bytes into a picture. We are only implementing the classic Gameboy (no color). This makes our job a bit easier.

The Control Register (0xFF40)

This register is used to control the LCD screen.

Bit 7: LCD Display Enable             (0=Off, 1=On)
Bit 6: Window Tile Map Display Select (0=0x9800-0x9BFF, 1=0x9C00-0x9FFF)
Bit 5: Window Display Enable          (0=Off, 1=On)
Bit 4: BG & Window Tile Data Select   (0=0x8800-0x97FF, 1=0x8000-0x8FFF)
Bit 3: BG Tile Map Display Select     (0=0x9800-0x9BFF, 1=0x9C00-0x9FFF)
Bit 2: OBJ (Sprite) Size              (0=8x8, 1=8x16)
Bit 1: OBJ (Sprite) Display Enable    (0=Off, 1=On)
Bit 0: BG Display                     (0=Off, 1=On)

For example, during the boot sequence:

LD A, $91           ; $005b
LD ($FF00+$40), A   ; $005d  Turn on LCD, showing Background

This loads 0x91 into the 0xFF40 control register. This is 1001 0001 in binary. So bit 7, 4, and 0 are set to 1. Everything else is 0. This performs all of these actions:

• Turns on the LCD display
• Selects 0x9800-0x9BFF as the tile map
• Disables window display
• Selects 0x8000-0x8FFF for the BG & Window tile data
• Selects 0x9800-0x9BFF for the BG tile map data
• Sets OBJ size to 8x8
• Disables OBJ display
• Enables BG display

LCD Status Register (0xFF41)

This register query for a variety of LCD statuses. The bits are:

Bit 6: LYC=LY Coincidence Interrupt (1=Enable) (Read/Write)
Bit 5: Mode 2 OAM Interrupt         (1=Enable) (Read/Write)
Bit 4: Mode 1 V-Blank Interrupt     (1=Enable) (Read/Write)
Bit 3: Mode 0 H-Blank Interrupt     (1=Enable) (Read/Write)
Bit 2: Coincidence Flag  (0:LYC<>LY, 1:LYC=LY) (Read Only)
Bit 1-0: Mode Flag       (Mode 0-3, see below) (Read Only)
        0: During H-Blank
        1: During V-Blank
        2: During Searching OAM-RAM
        3: During Transfering Data to LCD Driver

Bit 6 is used to enable a CPU interrupt when the LCD screen is redrawing a specific line (LY=0xFF44) and the game can specify the line with the LYC register (0xFF45). Bit 2 will be enabled when LYC=LY and disabled otherwise. Bit 1/0 indicate the current mode the LCD device is in. More details on the LCD status can be found here.

LCD Position and Scrolling Registers

0xFF42: Scroll Y (R/W) 0xFF43: Scroll X (R/W) These specify the position in the 256x256 pixel BG map, which point is displayed at the upper-left LCD display position. The values range from 0-255 (0x00 to 0xFF). The video controller automatically wraps back to the upper-left position in BG map when drawing exceeds the lower-right border of the BG map area.

0xFF44: Y-Coordinate (R) This register indicates the current vertical line that has data transferred to the LCD Driver. This register can take on any value between 0 through 153 (0x00-0x99). The values between 144 and 153 (0x90-0x99) indicate the V-Blank period where the display rests finishes a full refresh. Any writing to this register will reset the counter.

0xFF45: LY Compare (R/W) The Gameboy constantly compares the value of the 0xFF44 and 0xFF45 registers. When both values are identical, the coincidence bit in the status register (0xFF41) becomes set, and a STAT interrupt is requested.

0xFF4A: Window Y Position (R/W) 0xFF4B: Window X Position minus 7 (R/W) This register specifies the upper-left positions of the window area. The window is an alternate background area which can be displayed above of the normal background. OBJs (sprites) may be still displayed above or behind the window, just as for normal BG. The window becomes visible when positions are set in range WX=0..166, WY=0..143. A position of WX=7 and WY=0 locates the window at upper left, it is then completely covering normal background.

LCD Monochrome Palettes

0xFF47: BG Palette Data (R/W) This register assigns gray shades to the color numbers of the BG and Window tiles.

Bit 7-6: Shade for Color Number 3
Bit 5-4: Shade for Color Number 2
Bit 3-2: Shade for Color Number 1
Bit 1-0: Shade for Color Number 0

The four possible gray shades are:

0: White
1: Light gray
2: Dark gray
3: Black

0xFF48: Object Palette 0 Data (R/W) 0xFF49: Object Palette 1 Data (R/W) These registers assigns gray shades for sprite palette 0 and 1. They work exactly as BG Palette Data (0xFF47), except that the lower two bits aren't used because sprite data 00 is transparent.

LCD OAM DMA Transfers

0xFF46: DMA Transfer and Start Address (W) Writing to this register launches a DMA transfer from ROM/RAM to OAM memory (sprite attribute table). The written value specifies the transfer source address divided by 100h.

Source:      0xZZ00-0xZZ9F   ;ZZ in range from 0x00-0xF1
Destination: 0xFE00-0xFE9F