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Commit 8d80b73

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trdtnguyentrdtnguyen
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fix bugs
1 parent 2ab5967 commit 8d80b73

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5 files changed

+89
-28
lines changed

5 files changed

+89
-28
lines changed

‎build_mysql.sh‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,15 @@ IS_DEBUG=0
1111
#BUILD_NAME="-DUNIV_PMEMOBJ_WAL -DUNIV_TRACE_FLUSH_TIME"
1212
#BUILD_NAME="-DUNIV_PMEMOBJ_WAL -DUNIV_PMEMOBJ_WAL_ELR -DUNIV_TRACE_FLUSH_TIME"
1313
#BUILD_NAME="-DUNIV_NVM_LOG -DUNIV_PMEMOBJ_WAL -DUNIV_TRACE_FLUSH_TIME"
14-
#BUILD_NAME="-DUNIV_PMEMOBJ_PPL_STAT -DUNIV_PMEMOBJ_PAGE_LOG -DUNIV_PMEMOBJ_PART_PL -DUNIV_PMEMOBJ_PL -DUNIV_TRACE_RECOVERY_TIME"
15-
#BUILD_NAME="-DUNIV_PMEMOBJ_PPL_STAT -DUNIV_PMEMOBJ_PAGE_LOG -DUNIV_PMEMOBJ_PART_PL -DUNIV_PMEMOBJ_PART_PL_DEBUG -DUNIV_PMEMOBJ_PL -DUNIV_TRACE_FLUSH_TIME"
14+
#BUILD_NAME="-DUNIV_PMEMOBJ_PERSIST -DUNIV_PMEMOBJ_PPL_STAT -DUNIV_PMEMOBJ_PAGE_LOG -DUNIV_PMEMOBJ_PART_PL -DUNIV_PMEMOBJ_PL -DUNIV_TRACE_RECOVERY_TIME"
15+
#BUILD_NAME="-DUNIV_PMEMOBJ_PERSIST -DUNIV_PMEMOBJ_PPL_STAT -DUNIV_PMEMOBJ_PAGE_LOG -DUNIV_PMEMOBJ_PART_PL -DUNIV_PMEMOBJ_PART_PL_DEBUG -DUNIV_PMEMOBJ_PL -DUNIV_TRACE_FLUSH_TIME"
1616
#######################################
1717

18-
##### Simulate latency######################
18+
##### Simulate latency PL-NVM######################
19+
BUILD_NAME="-DUNIV_PMEM_SIM_LATENCY -DUNIV_PMEMOBJ_PERSIST -DUNIV_PMEMOBJ_PPL_STAT -DUNIV_PMEMOBJ_PAGE_LOG -DUNIV_PMEMOBJ_PART_PL -DUNIV_PMEMOBJ_PL -DUNIV_TRACE_RECOVERY_TIME"
20+
1921
#NO TX no persist less, use for simulation latency
20-
BUILD_NAME="-DUNIV_PMEM_SIM_LATENCY -DUNIV_PMEMOBJ_NO_TX -DUNIV_OPENMP -DUNIV_PMEMOBJ_BLOOM -DUNIV_PMEMOBJ_BUF -DUNIV_PMEMOBJ_BUF_PARTITION -DUNIV_PMEMOBJ_BUF_FLUSHER -DUNIV_PMEMOBJ_BUF_RECOVERY -DUNIV_TRACE_FLUSH_TIME"
22+
#BUILD_NAME="-DUNIV_PMEM_SIM_LATENCY -DUNIV_PMEMOBJ_NO_TX -DUNIV_OPENMP -DUNIV_PMEMOBJ_BLOOM -DUNIV_PMEMOBJ_BUF -DUNIV_PMEMOBJ_BUF_PARTITION -DUNIV_PMEMOBJ_BUF_FLUSHER -DUNIV_PMEMOBJ_BUF_RECOVERY -DUNIV_TRACE_FLUSH_TIME"
2123

2224
#TX LESS with PERSIST
2325
#BUILD_NAME="-DUNIV_PMEMOBJ_PERSIST -DUNIV_OPENMP -DUNIV_PMEMOBJ_BLOOM -DUNIV_PMEMOBJ_BUF -DUNIV_PMEMOBJ_BUF_PARTITION -DUNIV_PMEMOBJ_BUF_FLUSHER -DUNIV_PMEMOBJ_BUF_RECOVERY -DUNIV_TRACE_FLUSH_TIME"

‎storage/innobase/buf/buf0flu.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -833,7 +833,7 @@ buf_flush_write_complete(
833833
#if defined (UNIV_PMEMOBJ_PART_PL)
834834
//we only call pm_ppl_flush_page when the flushed page is persist on storage
835835
pm_ppl_flush_page(
836-
gb_pmw->pop, gb_pmw->ppl,
836+
gb_pmw->pop, gb_pmw, gb_pmw->ppl,
837837
bpage,
838838
bpage->id.space(),
839839
bpage->id.page_no(),

‎storage/innobase/include/my_pmemobj.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1243,6 +1243,7 @@ pm_ppl_parse_entry_id(
12431243
uint64_t
12441244
pm_ppl_write_rec(
12451245
PMEMobjpool* pop,
1246+
PMEM_WRAPPER* pmw,
12461247
PMEM_PAGE_PART_LOG* ppl,
12471248
uint64_t key,
12481249
byte* log_src,
@@ -1391,6 +1392,7 @@ pm_ppl_set_flush_state(
13911392
void
13921393
pm_ppl_flush_page(
13931394
PMEMobjpool* pop,
1395+
PMEM_WRAPPER* pmw,
13941396
PMEM_PAGE_PART_LOG* ppl,
13951397
buf_page_t* bpage,
13961398
uint64_t space,

‎storage/innobase/mtr/mtr0mtr.cc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1214,7 +1214,7 @@ uint64_t mtr_t::add_rec_to_ppl(
12141214
byte* log_src,
12151215
uint32_t rec_size)
12161216
{
1217-
return pm_ppl_write_rec(gb_pmw->pop, gb_pmw->ppl, key, log_src, rec_size);
1217+
return pm_ppl_write_rec(gb_pmw->pop, gb_pmw, gb_pmw->ppl, key, log_src, rec_size);
12181218
}
12191219

12201220
void

‎storage/innobase/pmem/pmem0log.cc‎

Lines changed: 79 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -1579,6 +1579,7 @@ pm_ppl_parse_entry_id(
15791579
uint64_t
15801580
pm_ppl_write_rec(
15811581
PMEMobjpool* pop,
1582+
PMEM_WRAPPER* pmw,
15821583
PMEM_PAGE_PART_LOG* ppl,
15831584
uint64_t key,
15841585
byte* log_src,
@@ -1611,6 +1612,10 @@ pm_ppl_write_rec(
16111612
uint64_t t1, t2;
16121613
#endif
16131614

1615+
#if defined (UNIV_PMEM_SIM_LATENCY)
1616+
uint64_t start_cycle, end_cycle;
1617+
#endif
1618+
16141619

16151620
assert(rec_size > 0);
16161621

@@ -1713,9 +1718,9 @@ pm_ppl_write_rec(
17131718
#endif
17141719
//move the diskaddr on the line ahead, the written size should be aligned with 512B for DIRECT_IO works
17151720
pline->diskaddr += plogbuf->size;
1716-
if (PERSIST_AT_WRITE){
1717-
pmemobj_persist(pop, &pline->diskaddr, sizeof(pline->diskaddr));
1718-
}
1721+
#if defined (UNIV_PMEMOBJ_PERSIST)
1722+
pmemobj_persist(pop, &pline->diskaddr, sizeof(pline->diskaddr));
1723+
#endif
17191724

17201725
// (1.4) write log rec on new buf
17211726
D_RW(free_buf)->hashed_id = pline->hashed_id;
@@ -1739,6 +1744,9 @@ pm_ppl_write_rec(
17391744
old_off = D_RW(free_buf)->cur_off;
17401745
D_RW(free_buf)->cur_off += rec_size;
17411746

1747+
#if defined (UNIV_PMEM_SIM_LATENCY)
1748+
PMEM_DELAY(start_cycle, end_cycle, 11 * pmw->PMEM_SIM_CPU_CYCLES);
1749+
#endif
17421750
// (1.5) write the header. This header is needed when recovery,
17431751
byte* header = ppl->p_align + plogbuf->pmemaddr + 0;
17441752
byte* ptr = header;
@@ -1757,6 +1765,9 @@ pm_ppl_write_rec(
17571765
pline->is_flushing = false;
17581766
os_event_set(pline->log_flush_event);
17591767

1768+
#if defined (UNIV_PMEM_SIM_LATENCY)
1769+
PMEM_DELAY(start_cycle, end_cycle, 4 * pmw->PMEM_SIM_CPU_CYCLES);
1770+
#endif
17601771
/*we update metadata on plogblock and flushing logbuf in non-critical section*/
17611772

17621773
/*(2) Get the plogblock*/
@@ -1781,31 +1792,44 @@ pm_ppl_write_rec(
17811792
plog_block->first_rec_size = rec_size;
17821793
plog_block->first_rec_type = type;
17831794

1795+
#if defined (UNIV_PMEMOBJ_PERSIST)
1796+
pmemobj_persist(pop, &plog_block->start_off, sizeof(plog_block->start_off));
1797+
pmemobj_persist(pop, &plog_block->start_diskaddr, sizeof(plog_block->start_diskaddr));
1798+
pmemobj_persist(pop, &plog_block->firstLSN, sizeof(plog_block->firstLSN));
1799+
pmemobj_persist(pop, &plog_block->first_rec_size, sizeof(plog_block->first_rec_size));
1800+
pmemobj_persist(pop, &plog_block->first_rec_type, sizeof(plog_block->first_rec_type));
1801+
#endif
1802+
1803+
#if defined (UNIV_PMEM_SIM_LATENCY)
1804+
PMEM_DELAY(start_cycle, end_cycle, 5 * pmw->PMEM_SIM_CPU_CYCLES);
1805+
#endif
17841806
//update the oldest
17851807
if (pline->oldest_block_off == UINT32_MAX) {
17861808
pline->oldest_block_off = item->block_off;
1787-
if (PERSIST_AT_WRITE){
1788-
pmemobj_persist(pop, &pline->oldest_block_off, sizeof(pline->oldest_block_off));
1789-
}
1809+
#if defined (UNIV_PMEMOBJ_PERSIST)
1810+
pmemobj_persist(pop, &pline->oldest_block_off, sizeof(pline->oldest_block_off));
1811+
#endif
1812+
1813+
#if defined (UNIV_PMEM_SIM_LATENCY)
1814+
PMEM_DELAY(start_cycle, end_cycle, pmw->PMEM_SIM_CPU_CYCLES);
1815+
#endif
17901816
}
17911817
//test
17921818
/*insert the pair (offset, bid) into the set*/
17931819
write_off = plog_block->start_diskaddr + plog_block->start_off;
17941820
pline->offset_map->insert( std::make_pair(write_off, item->block_off));
17951821

1796-
if (PERSIST_AT_WRITE){
1797-
pmemobj_persist(pop, plog_block, sizeof(PMEM_PAGE_LOG_BLOCK));
1798-
}
1799-
18001822
}
18011823
plog_block->lastLSN = rec_lsn;
1824+
#if defined (UNIV_PMEM_SIM_LATENCY)
1825+
PMEM_DELAY(start_cycle, end_cycle, pmw->PMEM_SIM_CPU_CYCLES);
1826+
#endif
18021827

18031828
/*persist the plogblock*/
1804-
if (PERSIST_AT_WRITE){
1805-
pmemobj_persist(pop, D_RW(free_buf), sizeof(PMEM_PAGE_LOG_BUF));
1806-
pmemobj_persist(pop, plogbuf, sizeof(PMEM_PAGE_LOG_BUF));
1807-
}
1808-
1829+
#if defined (UNIV_PMEMOBJ_PERSIST)
1830+
pmemobj_persist(pop, D_RW(free_buf), sizeof(PMEM_PAGE_LOG_BUF));
1831+
pmemobj_persist(pop, plogbuf, sizeof(PMEM_PAGE_LOG_BUF));
1832+
#endif
18091833

18101834
// (1.6) assign a pointer in the flusher to the full log buf, this function return immediately
18111835
pm_log_buf_assign_flusher(ppl, plogbuf);
@@ -1837,6 +1861,9 @@ pm_ppl_write_rec(
18371861
pmemobj_persist(pop, &plogbuf->cur_off, sizeof(plogbuf->cur_off));
18381862
}
18391863

1864+
#if defined (UNIV_PMEM_SIM_LATENCY)
1865+
PMEM_DELAY(start_cycle, end_cycle, 5 * pmw->PMEM_SIM_CPU_CYCLES);
1866+
#endif
18401867
if (!pline->is_req_checkpoint){
18411868
/*comment this line to disable checkpoint (for debugging)*/
18421869
pm_ppl_check_for_ckpt(pop, ppl, pline, plogbuf, rec_lsn);
@@ -1869,12 +1896,26 @@ pm_ppl_write_rec(
18691896
plog_block->first_rec_size = rec_size;
18701897
plog_block->first_rec_type = type;
18711898

1899+
#if defined (UNIV_PMEMOBJ_PERSIST)
1900+
pmemobj_persist(pop, &plog_block->start_off, sizeof(plog_block->start_off));
1901+
pmemobj_persist(pop, &plog_block->start_diskaddr, sizeof(plog_block->start_diskaddr));
1902+
pmemobj_persist(pop, &plog_block->firstLSN, sizeof(plog_block->firstLSN));
1903+
pmemobj_persist(pop, &plog_block->first_rec_size, sizeof(plog_block->first_rec_size));
1904+
pmemobj_persist(pop, &plog_block->first_rec_type, sizeof(plog_block->first_rec_type));
1905+
#endif
1906+
1907+
#if defined (UNIV_PMEM_SIM_LATENCY)
1908+
PMEM_DELAY(start_cycle, end_cycle, 5 * pmw->PMEM_SIM_CPU_CYCLES);
1909+
#endif
18721910
//update the oldest
18731911
if (pline->oldest_block_off == UINT32_MAX) {
18741912
pline->oldest_block_off = item->block_off;
1875-
if (PERSIST_AT_WRITE){
1876-
pmemobj_persist(pop, &pline->oldest_block_off, sizeof(pline->oldest_block_off));
1877-
}
1913+
#if defined (UNIV_PMEMOBJ_PERSIST)
1914+
pmemobj_persist(pop, &pline->oldest_block_off, sizeof(pline->oldest_block_off));
1915+
#endif
1916+
#if defined (UNIV_PMEM_SIM_LATENCY)
1917+
PMEM_DELAY(start_cycle, end_cycle, pmw->PMEM_SIM_CPU_CYCLES);
1918+
#endif
18781919
}
18791920
//test
18801921
/*insert the pair (offset, bid) into the set*/
@@ -1884,12 +1925,12 @@ pm_ppl_write_rec(
18841925
pline->offset_map->insert( std::make_pair(write_off, item->block_off));
18851926
pmemobj_rwlock_unlock(pop, &pline->meta_lock);
18861927

1887-
if (PERSIST_AT_WRITE){
1888-
pmemobj_persist(pop, plog_block, sizeof(PMEM_PAGE_LOG_BLOCK));
1889-
}
18901928
}
18911929

18921930
plog_block->lastLSN = rec_lsn;
1931+
#if defined (UNIV_PMEM_SIM_LATENCY)
1932+
PMEM_DELAY(start_cycle, end_cycle, pmw->PMEM_SIM_CPU_CYCLES);
1933+
#endif
18931934

18941935
//pmemobj_rwlock_unlock(pop, &plog_block->lock);
18951936
//pmemobj_rwlock_unlock(pop, &pline->lock);
@@ -3826,13 +3867,17 @@ pm_ppl_set_flush_state(
38263867
void
38273868
pm_ppl_flush_page(
38283869
PMEMobjpool* pop,
3870+
PMEM_WRAPPER* pmw,
38293871
PMEM_PAGE_PART_LOG* ppl,
38303872
buf_page_t* bpage,
38313873
uint64_t space,
38323874
uint64_t page_no,
38333875
uint64_t key,
38343876
uint64_t pageLSN)
38353877
{
3878+
#if defined (UNIV_PMEM_SIM_LATENCY)
3879+
uint64_t start_cycle, end_cycle;
3880+
#endif
38363881

38373882
ulint hashed;
38383883
uint32_t n;
@@ -3880,7 +3925,16 @@ pm_ppl_flush_page(
38803925
if (USE_BIT_ARRAY) {
38813926
pm_bit_clear(pline, pline->bit_arr, sizeof(long long), plog_block->id);
38823927
}
3928+
38833929
__reset_page_log_block(plog_block);
3930+
#if defined (UNIV_PMEMOBJ_PERSIST)
3931+
pmemobj_persist(pop, plog_block, sizeof(PMEM_PAGE_LOG_BLOCK));
3932+
#endif
3933+
3934+
#if defined (UNIV_PMEM_SIM_LATENCY)
3935+
/*the reset function takes 12 accesses*/
3936+
PMEM_DELAY(start_cycle, end_cycle, 12 * pmw->PMEM_SIM_CPU_CYCLES);
3937+
#endif
38843938

38853939
pmemobj_rwlock_unlock(pop, &plog_block->lock);
38863940

@@ -3931,8 +3985,11 @@ pm_ppl_flush_page(
39313985
}
39323986

39333987
pline->oldest_block_off = min_off;
3988+
#if defined (UNIV_PMEM_SIM_LATENCY)
3989+
PMEM_DELAY(start_cycle, end_cycle, 11 * pmw->PMEM_SIM_CPU_CYCLES);
3990+
#endif
39343991

3935-
}
3992+
}//end if (item->block_off == ...)
39363993
//pmemobj_rwlock_wrlock(pop, &pline->meta_lock);
39373994
HASH_DELETE(plog_hash_t, addr_hash, pline->addr_hash, key, item);
39383995
pmemobj_rwlock_unlock(pop, &pline->meta_lock);

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