此仓库为体系结构课程实验
1_VerilogSourceCode Verilog源代码
1_CPUCore_src CPU CPU core的verilog代码
2_Simulation 仿真用testBench代码2_BRAMInputFileGenerator 脚本文件，利用汇编文件生成对应的16进制指令流文件
4_ProjectDesignFiles 包含CPU的流水线模块设计图
5_DetailDocuments 包含每次实验的具体实验要求
-
Notifications
You must be signed in to change notification settings - Fork 1
GEoURo/Computer_Architecture_Lab
Folders and files
| Name | Name | Last commit message | Last commit date | |
|---|---|---|---|---|
Repository files navigation
About
No description, website, or topics provided.
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published