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campbellsan edited this page Jun 26, 2014 · 2 revisions

When the sel signal goes low, the core converts the current state of the inputs into a bit stream on the miso signal. The testbench sends in a number of bytes and also changes the inputs. You can see the output bitstream change on the miso signal when the inputs change.

Note that mosi is ignored in this design. The test bench sends bits in on it, just to prove that the changes are ignored. The p_out signal is wired to the Raspberry Pi GPIO4, the design routes this to the last pin on P1 that is, FB3_11.